Samsung Electronics Co., Ltd.

Sughyun Sung

Youngmook Oh

Hongsik Shin

Kyungseok Min

Heungsik Park

Wonhyuk Lee

Seongjin Nam

Hyunjoon Roh

Dohaing Lee

Dongwon Kim

Keun Hwi Cho

Donggyu Lee

Hojin Lee

Junggun You

Beomjin Park

Myeongcheol Kim

Myung-Hoon Jung

Moojin Kim

Myoung-Sun Lee

InWon Park

Hyunggoo Lee

Hyungdong Kim

YoungHoon Song

Migyeong Gwon

Hanbyul Choi

Jiyong Ha

A semiconductor device includes: an active pattern on a substrate, wherein the active pattern includes a plurality of channel layers stacked on one another; a plurality of source/drain patterns spaced apart from each other in a first direction and disposed on the active pattern, wherein the plurality of source/drain patterns are connected to each other through the plurality of channel layers; and first and second gate electrodes at least partially surrounding the channel layers and extending in a second direction, wherein the second direction intersects the first direction, wherein the active pattern has a first sidewall and a second sidewall that faces the first sidewall, and wherein a first distance between the first sidewall of the active pattern and an outer sidewall of the first gate electrode is different from a second distance between the second sidewall of the active pattern and an outer sidewall of the second gate electrode.

Semiconductor device including a field effect transistor and a method of fabricating the semiconductor device

A semiconductor device includes a gate pattern crossing over a substrate, the gate pattern including a gate insulating layer, a gate electrode, and a gate capping pattern sequentially stacked on the substrate, a gate spacer covering a sidewall of the gate pattern, a source/drain pattern on the substrate, the source/drain pattern being adjacent to the sidewall of the gate pattern, a contact pad on the source/drain pattern, a top surface of the contact pad being lower than a top surface of the gate electrode, a source/drain contact plug on the contact pad, and a protection spacer between the gate spacer and the source/drain contact plug, the protection spacer having a ring shape enclosing the source/drain contact plug.

Semiconductor device having a ring-shaped protection spacer above a contact pad and enclosing a source/drain contact plug

Semiconductor device having a ring-shaped protection spacer enclosing a source/drain contact plug

A method of fabricating a semiconductor device may include forming trenches in a substrate to define a fin structure extending in a direction, forming a device isolation layer to fill the trenches, and removing an upper portion of the device isolation layer to expose an upper side surface of the fin structure. The exposing of the upper side surface of the fin structure may include repeatedly performing an etching cycle including a first step and a second step, and an etching rate of the device isolation layer to the fin structure may be higher in the second step than in the first step.

Method of fabricating a semiconductor device

A semiconductor device includes a fin structure which vertically protrudes from a substrate and extends in a first direction parallel to a top surface of the substrate. The fin structure includes a lower pattern and an active pattern vertically protruding from a top surface of the lower pattern. The top surface of the lower pattern includes a flat portion substantially parallel to the top surface of the substrate. The lower pattern includes a first sidewall extending in the first direction and a second sidewall extending in a second direction crossing the first direction. The first sidewall is inclined relative to the top surface of the substrate at a first angle greater than a second angle corresponding to the second sidewall that is inclined relative to the top surface of the substrate.

Semiconductor device and method for manufacturing the same

A method of forming a semiconductor device can be provided by forming a mask pattern including non-metallic first spaced-apart portions that extend in a first direction on a lower target layer and non-metallic second spaced-apart portions that extend in a second direction on the lower target layer to cross-over the non-metallic first spaced-apart portions at locations. The lower target layer can be etched using the mask pattern.

Methods for forming a semiconductor device using masks with non-metallic portions

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Yongin-si, South Korea

Sughyun Sung