Texas Instruments Corporation

Intel Corporation

Sudhir Polarouthu

Srinivas Venkata Veeramreddi

Prakash Narayanan

Jasjot Singh Chadha

Shobhit Tyagi

Baher S Haroun

Ranjit Kumar Dash

Harikrishna Parthasarathy

Suresh Mallala

Gaurav Garg

Rejin Kanjavalappil Raveendranath

Anup J Deka

Apratim Chatterjee

Guruvara Nanda Kishore Mutchakarla

Biranchinath Sahu

Rejin Raveendranath Kanjavalappil

Ravi Vijayaraghavan

Sundara Siva Rao Giduturi

Nikunj Gandhi

A one-shot inductor current scheme which includes a controller to generate a signal to control a high-side switch and a low-side switch such that the high-side switch remains turned on beyond a turn-on time if a voltage level on an output supply rail remains below a reference. The scheme reduces the minimum operating voltage Vmin and/or frequency guard-band of the SoCs (system-on-chips).

Enhanced constant-on-time buck intellectual property apparatus and method

For a buck-boost DC-DC converter with n-type high-side field effect transistor (HSFET), a supply is derived from input and output rails, and this supply maintains a constant differential voltage independent of input supply voltage. The derived supply is used as the high supply (HS) of an HSFET Driver. As such, the HSFET resistance becomes independent of supply variation. A wide range ultra-low IQ (Quiescent current), edge triggered level-shifter provides support to a bootstrapped power stage of the inverting buck-boost DC-DC converter. When p-type HSFET is used, a supply is derived from the input and output supply rails, and this derived supply maintains a constant differential voltage independent to the input supply voltage. The derived supply is used as the low supply (LS) or 'ground' of the HSFET Driver. As such, the p-type HSFET resistance becomes independent of supply variation.

Power field effect transistor topology and bootstrap circuit for inverting buck-boost DC-DC converter

In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.

Power converters and compensation circuits thereof

A power supply, comprising a controller comprising a first switch coupled between a first node and a second node, a first resistor coupled between the second node and a third node, a second resistor coupled between the first node and a fourth node, a capacitor coupled between the fourth node and a fifth node, an amplifier coupled at a first input to the fourth node, at a second input to the third node, and at an output to the fifth node, and a comparator coupled at a first input to the fifth node and at a second input to the third node.

Power converter controller

An amplifier includes a first transistor coupled to a first voltage source node and a second transistor coupled to a second voltage source node. The first and second transistors also couple together at an intermediate node. The amplifier further includes a third transistor coupled to the intermediate node and a fourth transistor coupled to the third transistor at a positive output node of the amplifier. Further, the amplifier includes a fifth transistor coupled to the intermediate node and a sixth transistor coupled to the fifth transistor at a negative output node of the amplifier.

Multi-level class D amplifier

An integrated circuit includes a functional circuit () having a power grid () with a set of power grid points () for monitoring; and an electronic monitoring circuit () that has a variably operable reference circuit () responsive to an input register () and having an output, comparison circuitry () having plural outputs and having a first input coupled to the output of said variably operable reference circuit () and a set of second inputs each second input coupled to a respective one of said power grid points (); and an output register () having at least two register bit cells () respectively fed by the plural outputs of said comparison circuitry (). Other integrated circuits, and processes of testing and of manufacturing are also disclosed.

On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems

A DC-DC converter receives input power from a power source and generates a regulated DC voltage as an output. The DC-DC converter contains multiple blocks, each of which is powered by a power supply received on a supply terminal. The DC-DC converter also contains a voltage regulator to generate a lower voltage from the power source. The lower voltage generated by the regulator is provided as the power supply on the supply terminal when the regulated DC voltage is less than a reference value, and the regulated DC voltage itself is provided as the power supply on the supply terminal otherwise. The regulator is switched off when the blocks are powered by the regulated DC voltage, thereby leading to increased efficiency of the DC-DC converter.

Comparator multiplexing LDO and converted output to DC-DC converter circuitry

Two hysteresis levels, a high level and a low level, may be used to set a period (and the switching frequency) of the output voltage of a DC-DC converter, as well as the output ripple of the converter. These two thresholds may be changed using pairs of switches. By controlling the sequence and the duration of the on-time of the switches, spectral spurs in the output can be controlled and the amplitude and the frequency band of interest can be reduced. Additional spur reduction may be possible by randomizing the control of the switches.

Switch pairs between resistor network and high/low DC converter comparator input

The systems and methods of auto-configurable switching/linear regulation disclosed herein enable a device to operate in both DC-to-DC switching regulation and linear regulation applications. The systems and methods disclosed herein differentiate between switching and linear mode. If the application is for a linear regulator, there will only be a capacitor on the output. If the application is for switching mode regulation, there will be an inductor and a capacitor on the output. Then based on the determination, the mode is selected and the hardware is converted into switching regulator operation or linear regulator operation.

Growing community of inventors

Hyderabad Telangana, India

Sudhir Polarouthu