Cadence Design Systems, Inc.

Rambus Inc.

Sudhir Kumar Katla Shetty

Phalguni Bala

Kiran Baby

Younus Syed

Ashwin S M

Navin Kumar Mishra

Anirudha Shelke

Sreeja Menon

Charles J Wilson

Larry Arbuthnot

Nikhil Raghavendra Rao

System connections map interface connections between the memory device and the memory controller. The memory controller is configured with information about these 'mapped' connections. The memory controller uses the mapping information to: correctly present commands and addresses to the memory device, perform CA training on mapped connections, generate read training data that accounts for mapped connections, correctly address mapped memory device pins for write training per pin adjustments, correctly calculate error detection coding, and correctly read vendor identification information.

Memory interface mapping

In a receiver having at least a first equalizer and a sampler, a calibration module jointly calibrates a reference voltage and one or more equalizer coefficients. For each of a set of test reference voltages, an equalizer coefficient for the first equalizer may be learned that maximizes a right eye boundary of an eye diagram of a sampler input signal to a sampler of the receiver following the equalization stage. Then, from the possible pairs of reference voltages and corresponding optimal equalizer coefficients, a pair is identified that maximizes an eye width of the eye diagram. After setting the reference voltage, the first equalizer coefficient may then be adjusted together with learning a second equalizer coefficient for the second equalizer using a similar technique.

Receiver training of reference voltage and equalizer coefficients

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Karnataka, India

Sudhir Kumar Katla Shetty