Intel Corporation

Sudarshan V Rangaraj

Mitul Bharat Modi

Richard J Harries

Shankar Ganapathysubramanian

Sankara J Subramanian

Sairam Agraharam

Kristopher J Frutschy

Kris Frutschy

Guotao Wang

Kevin B George

Tom M Lappin

Andrew Yeohi

A linear coefficient of thermal expansion (CTE) mismatch between two materials, such as between a microelectronic die and a mounting substrate, may induce stress at the interface of the materials. The temperature changes present during the process of attaching a die to a mounting substrate can cause cracking and failure in the electrical connections used to connect the die and mounting substrate. A material with a CTE approximately matching the die CTE is introduced in the mounting substrate to reduce the stress and cracking at the electrical connections between the die and mounting substrate. Additionally, this material may comprise thin film capacitors useful for decoupling power supplies.

Embedded capacitors for reducing package cracking

A compliant structure for an electronic device comprises a substrate () composed of a first material () and a compliant zone () within the substrate. A plurality of solder joints () are located between, and form a connection between, the substrate and the electronic device (). The compliant zone reduces the degree of deformation experienced by the solder joints due to thermal mismatch loading between the substrate and the die during attachment of the die to the substrate (chip attach). This reduction in solder joint deformation reduces the likelihood that the solder joints will crack.

Compliant structure for an electronic device, method of manufacturing same, and system containing same

Methods of forming a microelectronic device and associated structures are described. Those methods may comprise forming a die-side conductive interconnect on a substrate, wherein the die-side conductive interconnect comprises a columnar portion and a base portion, and wherein a diameter of the base portion is greater than a diameter of the columnar portion.

Methods of forming stepped bumps and structures formed thereby

Method of forming a microelectronic package using control of die and substrate differential expansions. The method includes: providing a die-substrate combination including a substrate, a die disposed on the substrate, and plurality of solder paste disposed between the die and the substrate; reflowing the solder paste by exposing the die-substrate combination to temperatures changes including heating the die-substrate combination to liquefy the solder paste, and cooling down the die-substrate combination until the solder paste has solidified to form solder joints to yield the package; and controlling an expansion of the die and the substrate at least during cooling down to mitigate a relative difference in volumetric strain between the die and the substrate. Controlling may comprise exposing the die-substrate combination to pressure changes at least during cooling down.

Method of forming a microelectronic package using control of die and substrate differential expansions and microelectronic package formed according to the method

Embodiments of a method for attaching a die to a substrate using a flame or other heat source are disclosed. The flame may be produced by combustible gas. Also disclosed are embodiments of a system for performing die attach using a flame. Other embodiments are described and claimed.

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Chandler, AZ, United States of America

Sudarshan V Rangaraj