Sandisk Technologies Inc.

Western Digital Technologies, Inc.

Sudarshan Narayanan

Mitsuhiro Togo

Takashi Kobayashi

Mohan Dunga

Fumiaki Toyama

Guangyuan Li

Yuji Totoki

Qinghua Zhao

A memory apparatus and method of operation are provided. The apparatus includes word line switches coupled to word lines connected to memory cells. The word line switches are each configured to retain a switch threshold voltage and selectively connect the word lines to a common driver for supplying voltages thereto during a memory operation. A control means is configured to apply predetermined select block switch voltages to a first set of the word line switches connected to the word lines of a selected block. The predetermined select block switch voltages are based on the memory operation performed. The control means apply a predetermined unselect block switch voltage to a second set of the word line switches connected to the word lines of an unselected block. The predetermined unselect block switch voltage is selected to lower the switch threshold voltage of the word line switches of the second set.

Unselect word line switch bias scheme for non-volatile memory apparatus

A field effect transistor includes at least one line trench extending downward from a top surface of a channel region which laterally surrounds or underlies the at least one line trench, a gate dielectric contacting all surfaces of the at least one line trench and including a planar gate dielectric portion that extends over an entirety of a top surface of the channel region, a gate electrode, a source region, and a drain region.

Field effect transistors with gate fins and method of making the same

A non-volatile memory includes a plurality of word lines connected to non-volatile memory cells, a plurality of driver lines configured to carry one or more word line voltages, and a plurality of word line switches that selectively connect the driver lines to the word lines. To more efficiently utilize space on the die, the word line switches are arranged in a plurality of three dimensional stacks such that each stack of the plurality of stacks comprises multiple word line switches vertically stacked.

Non-volatile memory with three dimensional stacked word line switches

Growing community of inventors

San Jose, CA, United States of America

Sudarshan Narayanan