Sandisk Technologies Inc.

Subodh Taigor

Sridhar Yadala

Saurabh Kumar Verma

Deepak Kumar Meher

Rangarao Samineni

Methods and systems for reducing the settling time of a voltage regulator are described. In some cases, the settling time of the voltage regulator may be reduced by detecting that the voltage regulator is transitioning from a standby mode to an active mode and drawing additional current from the output of the voltage regulator during a current boosting phase. The current boosting phase may correspond with a current boosting pulse that is initiated when an enable signal is received from a controller and then is ended when the output voltage of the voltage regulator is within a first voltage of the desired regulation voltage or has overshot the desired regulation voltage by a second voltage (e.g., has overshot the desired regulation voltage by 150 mV).

Fast settling low dropout voltage regulator

Disclosed herein are techniques for generating a temperature independent reference current, which may be used during calibration. The temperature independent reference current may be generated based on a current through an on-chip calibration resistor. This alleviates the need for an off chip calibration resistor, which can be costly and cause slow calibration. A voltage at one terminal of the on chip calibration resistor may be modulated to substantially cancel a temperature coefficient of the on chip calibration resistor. This may result in the current passing through the on chip calibration resistor being temperature independent. The temperature independent reference current may be based on a reference voltage and a target calibration resistance.

Temperature independent reference current generation for calibration

An active voltage regulator circuit having improved wake-up response is presented. The circuit includes an op-amp whose output is connected to a pass device for supplying the output level, and has both capacitive and resistive parts in its feedback loop. When the regulator is enabled, the capacitive elements are initially connected, followed after a delay by the resistive elements of the feedback loop.

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Bengaluru, India

Subodh Taigor