Intel Corporation

Subodh Annojvala

Rabiul Islam

Joseph N Hong

Lloyd Briggs

Bitcell layouts for use in electronic devices and systems are described. One embodiment relates to a memory including at least one bitcell, the bitcell including a storage cell region and a read channel region. The storage cell region is substantially L-shaped and includes six transistors. The read channel region is shaped to fit together with the substantially L-shaped storage cell region to form a substantially rectangular bitcell shape. Other embodiments are described and claimed.

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Chandler, AZ, United States of America

Subodh Annojvala