Samsung Electronics Co., Ltd.

Su-Ryun Lee

Song-Ho Yoon

Bum-Hee Lee

Youn-Won Park

Byung-Ki Lee

Ju-Young Lee

Hong-Suk Choi

Min-young Kim

Hyun-chul Park

Chun-Um Kong

Si-Nae Hwang

A storage device includes a main storage and a storage controller to control the main storage. The main storage stores data and includes a plurality of nonvolatile memory devices. The storage controller loads at least one of (a) at least a portion of mapping tables and (b) at least one of a portion of directories to a host memory buffer included in an external host device, based on at least one of a size of the host memory buffer and locality information associated with a data access pattern of the host device. The mapping tables are stored in the nonvolatile memory devices and the mapping tables indicate a mapping relationship between a physical address and a logical address of corresponding ones of the nonvolatile memory devices. The directories store address information of the mapping tables.

Storage devices, data storage systems and methods of operating storage devices

A storage device includes a memory device including a metadata area and a journal data area. A memory controller is configured to control the memory device to write a metadata block to the metadata area and to write a journal data block to the journal data area. The metadata block includes metadata, and the journal data block includes both journal data and metadata storage information. The journal data includes log information pertaining to the metadata, and the metadata storage information includes information pertaining to storage of the metadata block.

Storage device and data processing method thereof

Provided are a memory device, a memory system, and a control method performed by the memory system. The control method includes operations of generating, by a first function block of the memory system, a main request comprising a first sub-request for a first operation that is requested by an external source and a second sub-request for a second operation that is dependent upon a processing result of the first operation; processing, by a second function block of the memory system, the first sub-request or the second sub-request; and when a processing result of the first sub-request performed by the second function block is a fail, transmitting, by a third function block of the memory system, abortion information to the first function block in response to the main request, regardless of processing the second sub-request.

Memory device, memory system, and control method performed by the memory system

Storage devices including a memory device and methods of operating the storage devices are provided. The storage devices may include a controller which is configured to program first bit data and second bit data paired with the first bit data into a memory device. The first bit data may be less significant bit data than the second bit data. The controller may be configured to selectively perform or skip backup of the first bit data when programming the second bit data.

Storage devices including memory device and methods of operating the same

A semiconductor memory device includes adjacent planes and a control module. The adjacent planes include a reserve field and a data field having multiple blocks. The blocks of each of the reserve and data fields are successively arranged over the adjacent planes to form a multi-plane operation group. The control module is configured to control the adjacent planes to conduct a first operation or a second operation in accordance with whether the reserve field includes free blocks corresponding to a unit of the multi-plane operation group. The first operation includes replacing blocks of the data field with free blocks of the reserve field in the unit of the multi-plane operation group. The second operation includes replacing one block of the data field with one free block of the reserve field.

Semiconductor memory device and block management method of the same

Methods of operating a non-volatile multi-bit memory device can include programming multi-bit memory cells included in one page of the device with page data including an error detection code based on the page data and determining the validity of the page data using the error detection code read from the multi-bit memory cells in response to an error during programming of the multi-bit memory cells, wherein the multi-bit memory cells in the one page are configured to store a single bit of the page data.

Growing community of inventors

Suwon-si, South Korea

Su-Ryun Lee