Skhynix Inc.

Su Min Yi

Dong Hwan Lee

Jin Gu Kim

Sung Jae Chung

Seung Won Kim

Jung Woon Shim

A memory device having a plurality of memory blocks compensates for a characteristic change of a memory cell due to stopping an erase operation. The memory device also includes a voltage generator configured to generate voltages used by the memory device in performing an erase operation on a selected memory block among the plurality of memory blocks. The memory device further includes an erase stop controller configured to control stopping and resuming the erase operation, and counting the number of times the erase operation is stopped to generate a stop count value when the erase operation is stopped. The memory device additionally includes a count value storage configured to store and output the stop count value.

Memory device and method of operating the same

A semiconductor memory device includes a memory block configured to include memory cells coupled to word lines and a peripheral circuit configured to perform a first program operation, a program verifying operation and a second program verifying operation for memory cells coupled to a word line selected from the word lines, and supply program allowable voltages having different levels to selected bit lines of program allowable cells located between program inhibition cells in the first program operation and the second program operation.

Growing community of inventors

Icheon-si, South Korea

Su Min Yi