Samsung Electronics Co., Ltd.

Su-Kyoung Kim

Gil-heyun Choi

Do-Sun Lee

Kun-sang Park

Byung-Lyul Park

Kwang-Jin Moon

Hee-Sook Park

Dong-chan Lim

Byung-Hee Kim

Ju-Il Choi

Chul-Ho Kim

Il-Gon Kim

In-Sun Park

Jong-myeong Lee

Kyung-Hoon Kim

Eun-Ji Jung

Jae-Hwa Park

Jong-Min Baek

Ji-soon Park

Tae-Hyeong Park

Byung-Hak Lee

Woong-hee Sohn

Sun-ghil Lee

Suk-chul Bang

Jin-Ho An

Yu-gyun Shin

Seong-hwee Cheong

Kook-chul Moon

Seong-min Son

Taek-jung Kim

Tae-ho Cha

Jong-min Back

A semiconductor device is provided having an insulating layer on a semiconductor substrate. The insulating layer and the semiconductor substrate define a through hole penetrating the semiconductor substrate and the insulating layer. A through electrode is provided in the through hole. A spacer is provided between the semiconductor substrate and the through electrode. An interconnection in continuity with the through electrode is provided on the insulating layer. A barrier layer covering a side and a bottom of the interconnection and a side of the through electrode is provided and the barrier layer is formed in one body.

Semiconductor devices having through silicon vias and methods of fabricating the same

An integrated circuit device includes a substrate through which a first through-hole extends, and an interlayer insulating film on the substrate, the interlayer insulating film having a second through-hole communicating with the first through-hole. A Through-Silicon Via (TSV) structure is provided in the first through-hole and the second through-hole. The TSV structure extends to pass through the substrate and the interlayer insulating film. The TSV structure comprises a first through-electrode portion having a top surface located in the first through-hole, and a second through-electrode portion having a bottom surface contacting with the top surface of the first through-electrode portion and extending from the bottom surface to at least the second through-hole. Related fabrication methods are also described.

Integrated circuit device including through-silicon via structure having offset interface

Provided are electrode-connecting structures or semiconductor devices, including a lower device including a lower substrate, a lower insulating layer formed on the lower substrate, and a lower electrode structure formed in the lower insulating layer, wherein the lower electrode structure includes a lower electrode barrier layer and a lower metal electrode formed on the lower electrode barrier layer, and an upper device including an upper substrate, an upper insulating layer formed under the upper substrate, and an upper electrode structure formed in the upper insulating layer, wherein the upper electrode structure includes an upper electrode barrier layer extending from the inside of the upper insulating layer under a bottom surface thereof and an upper metal electrode formed on the upper electrode barrier layer. The lower metal electrode is in direct contact with the upper metal electrode.

Electrode connecting structures containing copper

A non-volatile memory device is provided, including a substrate formed of a single crystalline semiconductor, pillar-shaped semiconductor patterns extending perpendicular to the substrate, a plurality of gate electrodes and a plurality of interlayer dielectric layers alternately stacked perpendicular to the substrate, and a charge spread blocking layer formed between the plurality of gate electrodes and the plurality of interlayer dielectric layers.

Non-volatile memory device

A method of fabricating a semiconductor device can include forming a trench in a semiconductor substrate, forming a first conductive layer on a bottom surface and side surfaces of the trench, and selectively forming a second conductive layer on the first conductive layer to be buried in the trench. The second conductive layer may be formed selectively on the first conductive layer by using an electroless plating method or using a metal organic chemical vapor deposition (MOCVD) or an atomic layer deposition (ALD) method.

Method of fabricating semiconductor device having buried wiring

A method of forming metal films includes preparing a substrate, on which an insulating layer and a metal layer formed of a first metal are exposed; and forming a metal capping layer by supplying an organic precursor of a second metal onto the substrate to deposit the second metal simultaneously on the insulating layer and the metal layer, wherein the second metal capping layer has different thicknesses on the insulating layer and the metal layer.

Method of forming a metal layer and a method of fabricating a semiconductor device

A sputtering target includes a tungsten (W)-nickel (Ni) alloy, wherein the nickel (Ni) is present in an amount of between about 0.01 weight % and about 1 weight %.

Sputtering target and semiconductor device manufactured using the same

A thin film transistor substrate having a semiconductor layer including a low concentration region and a source region/drain region adjacent to the low concentration region at both sides of a channel region made of polysilicon; a gate insulating layer and a conductive layer on the substrate the conductive layer patterned to form a gate electrode.

Thin film transistor substrate and fabrication thereof

Growing community of inventors

Suwon-si, South Korea

Su-Kyoung Kim