Macronix International Co., Ltd.

Su Chueh Lo

Ken Hui Chen

Kuen Long Chang

Chia-Feng Cheng

A memory device includes an error code generator, one or more first pins coupled to an external data bus, and one or more second pins coupled to an external system interface. The one or more first pins output data chunks to the data bus during a period of memory operation; and the error code generator is configured to transmit a status code via the one or more second pins during the period of memory operation. The status code indicates at least one of an error was detected, an error was detected and corrected, or an error was detected and not corrected.

Method and device for monitoring data error status in a memory

A method for monitoring data error status of a memory device includes generating, by a memory controller, a data status indication code indicating error status of a data chunk transmitted by the memory controller and outputting, by the memory controller, the data status indication code to a user interface.

In accordance with the disclosure, there is provided a memory device configured to implement an error detection protocol. The memory device includes a memory array and a first input for receiving a control signal corresponding to a command cycle. The memory device also includes a second input for receiving an access control signal during a command cycle and for receiving an error detection signal during the command cycle, wherein the error detection signal includes information corresponding to the access control signal. The memory device further includes control logic configured to verify the correctness of the access control signal by a comparison with the error detection signal and perform an operation on the memory array during the command cycle when the correctness of the access control signal is verified.

Device and method for detecting controller signal errors in flash memory

A method for outputting data error status of a memory device includes generating data status indication codes indicating error status of data chunks transmitted by a memory controller, and combining the data status indication codes with corresponding data chunks to generate an output signal, and outputting the output signal to a data bus pin.

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Hsinchu, Taiwan

Su Chueh Lo