Electronics and Telecommunications Research Institute

Samsung Electronics Co., Ltd.

Kt Corporation

Hanaro Telecom., Inc.

Sk Telecom Company, Ltd.

Ktfreetel Co., Ltd

Sk Telecom Ltd.

Su-Chang Chae

Youn-Ok Park

Jun-Woo Kim

Young-Hoon Kim

Young-il Kim

Yong-Su Lee

Young-Ha Lee

Eon-Young Hong

Jung-Pil Choi

Seung-Kwon Cho

The present invention relates to a URL providing apparatus and a method thereof, and a mobile station that accesses the Internet by using the provided URL, and an Internet access method thereof. The mobile station attaches an RF-ID tag that stores an RF-ID tag value corresponding to identification information of the mobile station thereto, and thus when a user brings the mobile station into an interrogation range of an RF-ID reader included in the URL providing apparatus, the URL providing apparatus receives the corresponding RF-ID tag value from the RF-ID reader. When the URL providing apparatus acquires an IP address of the mobile station by using the received RF-ID tag value and provides a URL to the mobile station by using the acquired IP address, the mobile station automatically accesses the Internet by using the URL. Such an Internet access method can minimize additional cost of the mobile station and simplify an Internet access process to a specific URL.

Apparatus and method for providing URL, mobile station, and method for accessing internet by using the provided URL

A subcarrier allocating apparatus allocating data to be transmitted to a plurality of orthogonal subcarriers in an orthogonal frequency division multiplexing (OFDM) system is provided. The apparatus includes a logical index generator generating a logical index for allocating a data subcarrier to a physical index, the logical index being included with only data subcarriers and the physical index indicating a location of a substantial subcarrier within a symbol, an intermediate index converter converting the logical index into an intermediate index by performing a given operation on the generated logical index and a pilot location constant, and a physical index converter converting the intermediate index into a physical index based on the number of data subcarriers on the left and right sides of a null subcarrier for insertion of a guard interval formed by the null subcarrier.

Subcarrier allocation apparatus and method, subcarrier de-allocation apparatus and method in OFDM system

In a decoding apparatus in a portable Internet terminal, a channel encoded symbol received from a transmitter is decoded by one of a chase-combining scheme and a code-combining scheme selected based on an ID value of the subpacket indicating a start position of the symbol. In this case, the chase-combining scheme is partly used for the encoded symbol of the information bit. With such a mode, decoding can be performed at a low code rate.

Decoding apparatus and method thereof

Disclosed is a demodulation apparatus for receiving signals by an adaptive modulation and coding method, and demodulating the signals, in an OFDMA based packet communication system, comprising: a QAM demapper for performing QAM demapping to the received signals by a modulation method using a maximum modulation ratio, until modulation methods for each of sub-channels are analyzed; a slot buffer for storing the data outputted from the QAM demapper; a channel decoder for decoding the data stored in the slot buffer and analyzing modulation methods for each sub-channels and transferring the analyzed modulation methods to the QAM demapper; and in at the same time, reading valid data from the data stored in the slot buffer, based on the analyzed modulation methods for each sub-channels, and demodulating the valid data.

Demodulation apparatus for efficiently embodying adaptive modulation and coding method in OFDMA based packet communication system and method thereof

The present invention relates to a decoder for tail-biting convolution codes and a method thereof. The decoder receives an encoding bit sequence in a convolutional encoding method from a channel, generates an expanded encoding bit sequence, Viterbi decodes the expanded encoding bit sequence, and generates decoded data. In addition, the decoder selects a central bit sequence of the decoded data, rearranges the central bit sequence, and generates final decoded data. Accordingly, the decoder has a simplified configuration for decoding the bit sequence encoded in the tail biting convolutional encoding method, and the decoder also decodes a bit sequence encoded in a zero-tail convolutional encoding method.

Viterbi decoder and method thereof

The present invention provides an LDPC encoder, a channel encoder of a portable internet system including the LDPC encoder, and an encoding method thereof. The LDPC encoder according to the present invention generates a Costas array, shifts it, generates an analogous circulation parity check matrix having a repeated pattern from the shifted Costas array, and performs encoding by using the parity check matrix. With this LDPC encoder, complexity of encoding system may be reduced.

Low density parity check encoder using costas array, and channel encoder of high speed portable internet system comprising the same and channel encoding method

The present invention relates to a Viterbi decoder and a Viterbi decoding method in a register exchange method. The Viterbi decoder receives an encoded bit sequence of a convolutional encoding method from a channel, generates an expanded encoded bit sequence by cyclically adding a part of the encoded bit sequence or the entire encoded bit sequence to the encoded bit sequence more than one time, performs a Viterbi decoding operation in a register exchange method, and generates decoded data. In addition, the Viterbi decoder selects an end bit sequence corresponding to the number of the unit of encoded bits among the decoded data, rearranges an order of the end bit sequence, and generates final decoded data.

Viterbi decoder and viterbi decoding method

An encoder using LDPC (low density parity check) codes, and an encoding method. The encoder comprises a parity check matrix generator for generating a parity check matrix H; and a codeword generator for processing the parity check matrix H to generate a codeword, and the codeword generator comprises: an AB analyzer for analyzing the parity check matrix H into matrixes A and B; a pivoting unit for pivoting the parity check matrix H; a bit-reversing unit for bit-reversing the pivoted matrix; an LU analyzer for analyzing the matrix A into matrixes L and U; and a codeword generator unit for performing a logical operation on the matrixes A, B, L and U. A bit-reversing method is used to effectively generate a parity check matrix having a high girth by using a regular encoder.

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Daejeon, South Korea

Su-Chang Chae