Samsung Electronics Co., Ltd.

Su-A Kim

Ki-Whan Song

Kyu-Nam Lim

Bum-Jae Lee

A memory device includes a plurality of memory blocks. Each memory block includes a plurality of bit lines, a plurality of word lines, a plurality of memory cells provided at intersections of the bit lines and word lines; a plurality of capacitors, and a plurality of sense amplifiers. Each sense amplifier has a first input and a second input. The first input is connected to a first bit line of a first one of the memory blocks and is coupled via one of the capacitors to a first bit line of a second one of the memory blocks. The second input of the input is connected to a second bit line of the second one of the memory blocks and is coupled via one of the capacitors to a second bit line of the first one of the memory blocks.

Memory device having open bit line structure and method of sensing data therefrom

A semiconductor memory device having a bit line sense amplifier connected to a bit line pair may include a precharge part to precharge first and second drive nodes of the bit line sense amplifier to an equal voltage level. The device may include a switching part operatively connecting the first and second precharge nodes to the first and second drive nodes in response to sense amplifier drive signals applied during a data non-access mode. To drive power in the bit line sense amplifier, the precharge voltage may be applied in a precharge state to precharge the first and second drive nodes to the equal voltage level, the device may shift from the precharge state to an operational state to cut off the applied precharge voltage, and driving voltages may be applied to the first and second drive nodes to power the bit line sense amplifier of the device.

Semiconductor memory device having improved bit line sensing operation and method for driving power in a bit line sense amplifier of the semiconductor memory device

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Yongin-si, South Korea

Su-A Kim