Qualcomm Incorporated

Semtech Corporation

Arques Technology, Inc.

Other

Harris Corporation

California Micro Devices Corp.

Stuart Pullen

Terry J Groom

Chunping Song

Jialei Xu

Steve Hawley

Patrick Anthony Begley

Arecio A Hernandez

William Rader

Michael Bui

Jeffrey M Strang

David W Hoyt

Thomas J O'Brien

Kwang H Liu

Ta-Tung Yen

Neal L Horovitz

Shashank Prakash Mane

David George Hoyt

An apparatus is disclosed for operating a charge pump in a high-efficiency low-ripple burst mode. In an example aspect, the apparatus includes a charge pump with a flying capacitor, a switching circuit, and a burst-mode controller. The switching circuit is coupled to the flying capacitor and configured to selectively: be in a burst configuration to charge and discharge the flying capacitor based on a clock signal; or be in a pulse-skipping configuration. The burst-mode controller is coupled to the switching circuit and configured to trigger the switching circuit to transition from the pulse-skipping configuration to the burst configuration at a time that occurs between rising edges of the clock signal. The burst-mode controller is also configured to cause charging of the flying capacitor to occur for approximately half a period of the clock signal responsive to triggering the switching circuit to transition from the pulse-skipping configuration to the burst configuration.

High-efficiency low-ripple burst mode for a charge pump

Methods and apparatus for current sensing and error correction in a switched-mode power supply composed of a high-side transistor coupled to a low-side transistor are described. One example method generally includes capturing a current associated with the low-side transistor at a first time corresponding to the low-side transistor turning off; capturing a current associated with the high-side transistor at a second time corresponding to a first delay after the high-side transistor turns on; capturing the current associated with the high-side transistor at a third time corresponding to the high-side transistor turning off; and applying a first correction current to a current-summing node of the current-sensing circuit for a first interval based on the first delay, wherein the first correction current is based on the captured current associated with the low-side transistor at the first time and on the captured current associated with the high-side transistor at the second time.

Lossless average input and output current sensing in a switched-mode power supply

Certain aspects of the present disclosure generally relate to reducing the size of parallel charging circuits for charging a battery in a portable device, while still effectively providing input current sensing and reverse current blocking capabilities. One example battery charging circuit generally includes: (1) a first charging circuit comprising a first charging output connectable to a battery and a first converter to provide power to the first charging output; and (2) a second charging circuit comprising a second charging output connectable to the battery, a second converter to provide power to the second charging output, a first transistor coupled between an output of the second converter and the second charging output, and a current-sensing circuit coupled to the output of the second converter to sense a current through the first transistor.

Master-slave charging circuit with slave charger input current sensing and adaptive battery current limiting

A multi-phase (e.g., dual-phase) concurrent configuration of a power management component supports higher current levels to peripheral devices while maintaining acceptable thermal limits. A dual-phase integrated circuit (IC) having a first input/output (I/O) port coupled to a battery and a second I/O port coupled to an adapter and a peripheral device implements the configuration. The dual phase IC includes a dual-phase voltage regulator that selectively provide power (i) from the first I/O port to the second I/O port to provide power to the peripheral device or (ii) from the second I/O port to the first I/O port to provide power to the battery. A controller activates a boost phase to power the second I/O port in response to detecting a demand current of the peripheral device exceeds a maximum current available from the adapter.

Dual-phase operation for concurrently charging a battery and powering a peripheral device

Certain aspects of the present disclosure provide methods and apparatus for current sensing and error correction, or at least adjustment, for a switching regulator. One example current-sensing circuit generally includes a first amplifier, a buffer, a low-pass filter, a first switch coupled between an output of the first amplifier and an input of the buffer, a second switch coupled between the output of the first amplifier and an input of the low-pass filter, a third switch coupled between an output of the buffer and the input of the low-pass filter, and a fourth switch coupled between the input of the low-pass filter and a reference node for the circuit.

Error correction for average current sensing in a switching regulator

In one embodiment, a method receives a shed comparison signal that is based on a comparison of a voltage detected from a voltage converter to a reference voltage and receives a zero cross signal that indicates whether a current from the voltage converter has crossed zero. The shed comparison signal is sampled for a first number of clock cycles to generate shed comparison sampled values. Also, the zero cross signal is sampled for a second number of clock cycles to generate zero cross sampled values where the second number of clock cycles are less than the first number of clock cycles. The method determines a change between a shed state and an unshed state based on the shed comparison sampled values for the first number of clock cycles or the zero cross sampled values for the second number of clock cycles.

Charge shedding circuit

In one embodiment, a correction circuit comprises circuit comprises a replica transistor biased at a current density to match that of a high side transistor of an output power switch at a specific load. A sample and hold circuit is coupled to the replica transistor to sample a voltage across the replica transistor. A differential amplifier provides a level shifted differential replica voltage to a tap of a resistor ladder of a successive approximation register analog-to-digital converter in response to the sampled voltage across the replica transistor. A current source provides a current to a top of the resistor ladder.

Correction circuits for successive-approximation-register analog-to-digital converters

A plurality of constant ON-time buck converters are coupled to a common load. The output of each buck converter is coupled to a common load via a series sense resistor. The regulated output voltage across the common load is compared to a reference voltage to generate a start signal. The start signal is alternately coupled to the controller on each buck converter. The ON-time of a master buck converter is terminated when a ramp signal generated from the regulator input voltage exceeds the reference voltage. All other slave converters have an ON-time pulse started by the start signal and stopped by comparing a sense voltage corresponding to their output current during their ON-time pulse to the peak current in the master converter during its ON-time. A counting circuit with an output corresponding to each of the plurality of buck converters is used to select which buck converter receives the start signal.

Peak current sharing in a multi-phase buck converter power system

A constant ON-time controller for a buck converter utilizes dual symmetrical ramps. The ramps may be generated artificially or by sensing the voltage across a sense resistor in the output. The ramp may also be generated by sensing the voltage across the 'ON' resistance of the low side FET in the switching regulator. A modified output voltage has one of the ramps superimposed and a modified reference voltage has the other ramps superimposed. The modified output voltage and the modified reference voltage are compared to determine when to start the ON-time of the buck converter. The dual ramps reduce, noise susceptibility. The ON-time is stopped in response to charging a capacitor with the regulator input voltage. An offset may also be generated representing the difference between the average output voltage and the reference voltage. The offset is used to generate a modified reference to compensate for the offset.

Constant ON-time controller for a buck converter

A compensated reference voltage for the controller of a buck regulator corrects for offsets and controls the rate at which the output load current can change in response to a change in the reference setting output voltage level of the buck converter. A current source is coupled to a resistor that has one terminal connected to the ground potential of the output voltage. The voltage across this resistor generates a remote reference voltage. A feedback current is generated as a function of the difference between the remote reference voltage and the output voltage. The feedback current is time integrated to form the compensated reference, which is used to control the ON-time of the buck converter.

Slew rate limited reference for a buck converter

Pulse width modulated (&ldquo;Class D&rdquo;) amplifiers and controllers switching in the 50 khz to 2 MHz range generate harmonics that interfere with AM radio reception. This interference has precluded wide spread acceptance of class D amplifiers in products that include an AM radio. The amplifier described here uses a a harmonic avoidance modulator when operating with an AM radio to avoid generating harmonics at the receiver selected frequency or the intermediate (IF) frequency thereof.

Dual mode class D amplifiers

Pulse width modulated (&ldquo;Class D&rdquo;) amplifiers and controllers switching in the 50 khz to 2 MHz range generate harmonics which interfere with AM radio reception. This has precluded wide spread acceptance of class D amplifiers in products with an AM radio. The amplifiers described here use a modified modulation technique when operating with an AM radio to avoid generating harmonics at the receiver selected frequency or its intermediate (IF) frequency. One embodiment uses a harmonic avoidance modulator. A second embodiment uses two or more oscillators and tests for the least distorted output signal. A third embodiment switches the mode of operation to a class AB amplifier when an AM signal is amplified.

A system and method provides virtual ripple signal generation for use in voltage regulation applications. Some switch-mode power converters or voltage regulators use output signal ripple to effect voltage regulation. A virtual ripple generator provides this type of voltage regulator with a virtual ripple signal comprising an offset component responsive to actual load voltage, but with a generated AC ripple component of arbitrary magnitude that is independent of actual output signal ripple. Unlike the actual output ripple signal, the generated AC ripple component is not dependent on implementation specifics, such as circuit board layout or output capacitor ESR, and may have its gain set independent of the offset component. The generated AC ripple component is synchronized to the inductor switching actions of the voltage regulator and thus reflects actual inductor phase switching in single and multi-phase regulation applications. Virtual ripple signal generation can include output (load) voltage droop compensation.

Virtual ripple generation in switch-mode power supplies

A ripple-mode controller provides reliable operation in multi-phase power supply circuits, over a variety of operating conditions. Cross-phase blanking allows the controller to preserve the desired phase relationship between the switching pulses its provides to the different output phases, and permits the controller to operate each output phase at nearly 100% duty cycles. Active current sharing compliments blanking operations by adjusting the width of switching pulses the controller provides to one or more of the output phases based on detecting load current imbalances between the different output phases. With active current sharing, the controller prevents one or more output phases from carrying excessive portions of the load current. Further complimenting its operation, the controller may include virtual ripple generation to increase the noise immunity of its ripple-mode regulation.

Self-clocking multiphase power supply controller

A voltage positioning technique allows a power supply controller to more fully exploit active voltage positioning as a way of maintaining supply voltage within the limits defined for an associated electrical load. The supply voltage is allowed to &ldquo;droop&rdquo; as a function of load current. Droop may be implemented in linear proportion to load current, or as a discrete droop function once load current exceeds a given threshold. In either case, the droop circuitry of the supply controller implements a bounding function that establishes an accurately known maximum droop voltage magnitude. This maximum droop voltage limit establishes a reliable lower limit for the supply voltage independent of increasing load current. This accurately set lower bound for the droop voltage enables the controller to more aggressively position the supply voltage at the lower voltage limit of the load, which minimizes voltage overshoot and load power consumption.

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Raleigh, NC, United States of America

Stuart Pullen