Atmel Corporation

Inside Secure

Stuart Kincaid

Louis Frew

Graeme Hickey

The invention relates to a semiconductor device including N memory modules, N being greater than or equal to three, each module having an array of memory cells arranged in rows and columns, a write circuit coupled to each module and configured to write data in the memory cells, a read circuit coupled to each module and configured to supply output data from the memory cells, a module selection circuit configured to individually select one memory module in a regular operation mode, and to collectively select two or more of the modules in a parallel mode, and a comparator circuit coupled to the N modules and configured to compare, in the parallel mode, the output data supplied by the N modules.

Device and method to perform a parallel memory test

A device can include one or more circuits that are configured to be powered by a supply voltage having a specified minimum operating value and a specified nominal operating value; and a reset circuit having a first voltage threshold and a second voltage threshold, the first voltage threshold having a value between the specified minimum operating value and the specified nominal operating value, the second voltage threshold having a value that is less than the specified minimum operating voltage. The reset circuit can be configured to a) reset the one or more circuits when the device is functioning in a first mode and the supply voltage drops below the first threshold and b) reset the one or more of circuits when the device is functioning in a second mode and the supply voltage drops below the second threshold.

Growing community of inventors

Glasgow, United Kingdom

Stuart Kincaid