National Semiconductor Corporation

Burr-brown Corporation

Stuart B Shacter

Mark J Mercer

David J Kunst

Gregory J Smith

Sean S Chen

Yinming Chen

Steve A Martinez

A transconductance stage is provided. The transconductance stage includes a tail current source, a differential pair, and two current mirrors. The input to each of the current mirrors is connected to the drain of a separate one of the transistors in the differential pair. The two current mirrors each have two outputs so that one of the outputs can be used to determine whether the output current exceeds a threshold (e.g. nine-tenths of the tail current). If the source current exceeds the threshold, extra source current is switched in to the output so that output source current is increased. Similarly, if the sink current exceeds the threshold, extra sink current is switched in to the output so that the output sink current is increased. This way, the transconductance stage can supply large output currents in response to a large signal input but maintains low quiescent current for small input signals.

Apparatus and method for transconductance stage with high current response to large signals

A circuit is arranged as a class B amplifier with a rail-to-rail output swing and a small deadband. The circuit has two parallel input stages that each use an amplifier configured as a unity gain voltage follower. The output of each stage drives a high current output transistor. The output transistors are complementary transistors arranged in a common source configuration. The common source configuration operates as a complementary class B amplifier, which conducts no quiescent bias current. An offset voltage is introduced in each input stage, which creates a small deadband in the output voltage as it switches between sinking current and sourcing current. The offset voltage is selected to ensure that the output transistors are not both simultaneously activated.

Class B power buffer with rail to rail output swing and small deadband

A method and apparatus provide for accurate low current generation using switched capacitor techniques. The current generator includes a reference voltage generator that provides a reference signal to a switched capacitor integrator. In one example, the reference circuit includes a switched capacitor divider. The switched capacitor integrator circuit produces a voltage ramp in response to the reference signal and other timing signals. The rate of the voltage ramp is proportional to the ratio of capacitors in the switched capacitor integrator and a clock frequency that is associated with the timing signals. A feedback circuit impresses the voltage ramp across an output capacitor circuit that has a very low capacitance value. The capacitor is arranged to differentiate the voltage ramp to produce an accurate low current. The switched capacitor design is suitable for integration in a monolithic integrated circuit. The integrator and the feedback stage are periodically reset.

Accurate ultra-low current generator

A comparator circuit having a first state and a second state, a threshold potential for transition from the first state to the second state, another threshold potential for transition from the second state to the first state, and hysteresis characteristics that are independent of process, temperature, and supply voltage variations. Preferably, the threshold potentials and hysteresis characteristics depend only on a reference potential and on ratios of resistances of pairs of resistors. In some embodiments, the circuit asserts an output signal in response to an input potential and a reference potential, and includes a comparator (having an output which asserts a binary output signal and two comparator inputs) and additional circuitry coupled to the comparator inputs and coupled to receive the input potential, the additional circuitry including a set of resistors and a current source, the current source is coupled to the output and configured to draw a first current when the output signal has its first value and a second current when the output signal has its second value, the current source includes a second set of resistors and is coupled to receive the reference potential, and the current source is implemented so that each of the first current and the second current is independent of all parameters other than the reference potential and a resistance of each resistor of the second set of resistors.

Comparator with process and temperature insensitive hysteresis and threshold potentials

An amplifier input stage having a constant input gm and including first and second differential transistor pair so as to provide operation with inputs at or near the upper and lower power supply rails. A comparator circuit operates to control which of the transistor pair is active based upon the relative magnitudes of the amplifier input stage inputs and a reference voltage.

Input stage for constant gm amplifier circuit and method

A circuit for providing hi-Z charging of a deeply discharged battery includes a load simulator circuit to provide a charging load resistance even when the battery has been discharged to 0V. The load simulator circuit includes a transistor connected in series with the battery. A logic circuit detects when the battery voltage is below a minimum threshold voltage and instructs a voltage control circuit to provide a constant voltage across the battery and the load simulator circuit. The logic circuit also applies the output of a current control circuit to the gate terminal of the transistor, enabling the current control circuit to regulate the total resistive load of the battery-transistor pair and thus maintain a constant hi-Z charge current across the battery. In addition, because the load simulator circuit allows the voltage applied to the battery to remain at a predetermined level above the battery voltage, that same voltage can also be used as the supply voltage for the related circuitry, eliminating the need for a separate fixed voltage supply.

Method and apparatus for hi-Z mode battery charging

A control circuit is provided to minimize the charging cycle time of a battery charging system by maximizing the length of time that high constant charging current is applied to a discharged battery. The control circuit includes a constant current (CC) error amplifier, a constant voltage (CV) error amplifier, an output amplifier, and two pole-splitting compensation networks. The control circuit works in conjunction with a power source to charge a secondary battery. The pole-splitting compensation networks allow the CC, CV, and output amplifiers to be configured for high gain, without sacrificing output stability. The control circuit provides a sharp transition between the CC mode and CV mode of operation. In the CC mode, fast bulk battery charging is provided. In the CV mode, the control circuit initially provides a 'top-off' charge to the battery and subsequently safely maintains the battery at its fully charged state. By using bi-directional transconductance error amplifiers as the CC and CV error amplifiers, the control circuit can be optimized for pole-splitting compensation. The control circuit can be operated with a constant internal reference voltage or a variable internal reference voltage. When a variable internal reference voltage is applied, the charging cycle time of the control circuit is further minimized through a charge current compensation technique.

Current-to-voltage transition control of a battery charger

A bidirectional current control circuit suitable for use in controlling the charging and discharging of rechargeable battery cells includes two serially connected metal oxide semiconductor field effect transistors (MOSFETs) with respective body diodes, a resistor which is connected in series with the MOSFETs and develops a voltage based upon the current through such MOSFETs, and a control circuit. The control circuit monitors the voltage across the resistor and selectively switches the MOSFETs on or off individually. As long as the current through the MOSFETs is less than a maximum positive current and more than a minimum negative current, both MOSFETs are maintained in their respective on states. When the negative current becomes less than a minimum negative current, the first MOSFET is turned off while the second MOSFET is turned on, and when the positive current becomes greater than a maximum positive current, the second MOSFET is turned off while the first MOSFET is turned on. In both situations, when the current conducted by the MOSFET which is turned on and the body diode of the MOSFET which is turned off reverses direction and rises above a minimum current while remaining below the corresponding maximum current, a return to a safe operating condition is thereby indicated and both MOSFETs are turned on. In an alternative embodiment, the control circuit monitors the voltage across the MOSFETs themselves to determine whether and when to switch the individual MOSFETs on or off.

Bidirectional current control circuit suitable for controlling the

A CMOS amplifier output stage including a complementary output MOSFET transistor pair whose channels are connected together in series between a supply voltage and a reference potential, and whose gates are driven by a complementary MOSFET level shifting transistor pair and by bias voltage and current circuitry. Preferably, the level shifting transistor pair is a diode-connected NMOS transistor and a diode-connected PMOS transistor, the bias circuitry includes a source follower which drives the source of one of the diode-connected transistors with a current determined by an input voltage, all active elements of the invention are MOSFET transistors, and the minimum supply voltage required for operation is (V.sub.GS +2V.sub.SAT), where V.sub.GS is the largest source to gate voltage of the MOSFET transistors and V.sub.SAT is the largest source to drain voltage of the MOSFET transistors during operation in the saturation region. This allows operation with a supply voltage as low as 1.8 volts with MOSFET transistors suitable for typical applications. The quiescent output current is well controlled and is determined by the device sizes of the MOSFET transistors. The invention can be implemented as part of a standard cell amplifier for any of a variety of mixed analog/digital circuits, even using high density, low voltage processes.

Low voltage CMOS amplifier output stage

A class AB low voltage output stage with improved current drive capability where the signal input to the stage modulates the base drive currents of both an output transistor sourcing current to a load and an output transistor sinking current from the load. Coupling the base drive currents by means of the input amplifier permits higher drive currents to be obtained for the output transistors without increasing the quiescent current of the circuit.

Low volatage output stage with improved output drive

An RC oscillator operates at very low current levels and manifests very brief internal component delays. The RC oscillator does not employ a conventional comparator and a conventional hysteresis circuit for changing reference voltages on the comparator. Instead, the RC oscillator includes a plurality of amplifiers. Hysteresis is achieved by changing the threshold voltage of one of the amplifiers. The threshold voltage is changed by switching different current values through the transistor so that the current for activating the amplifier is different from the current for deactivating the amplifier.

Micropower RC oscillator having hysteresis produced by switching current

A complementary transistor class AB output stage (200) utilizes a complementary pair of output drivers (220, 222) connected in series between the power supply rails (210, 216) to furnish the stage output. An output driver (206) is a composite pair of transistors in a Darlington configuration, which boosts the current gain and input resistance of the output stage. Bases of the output drivers are connected by a complementary pair of parallel connected drivers (226, 228), which function as common base level shifters. Quiescent bias of the output drivers is achieved by a pair of constant current transistors (232, 238) that are operated as complementary current mirrors. Inputs to the mirrors are relatively low current sink (252) and source (250) supplies. A level shifter and its corresponding current mirror are configured so that base currents flowing therein, which may be variable due to temperature and process variations, are generally shunted away from the current mirrors and toward an output driver to maintain mirrored currents and assist output drive.

Mirror and bias circuit for class AB output stage with large swing and

An attenuator for use in an integrated circuit window comparator circuit provides voltage division across an input voltage divider including a large number of identical thin film resistor segments combined in various series and parallel arrangements so that resistive voltage division of the input signal is in the same ratio as capacitive voltage division of the input signal by parasitic capacitances of the resistors.

Growing community of inventors

Tucson, AZ, United States of America

Stuart B Shacter