International Business Machines Corporation

Stuart A Friedberg

Paul Edward McKenney

Brent A Kingsbury

Phillip E Krueger

Amit Kumar Jain

Sunil K Nagarajrao

Sunil J Unadkat

Craig N Butler

Akimasa Fleshler

Paul E Mckenney

Methods for dynamically allocating memory in a multiprocessor computer system such as a non-uniform memory access (NUMA) machine having distributed shared memory. The methods include allocating memory by specified node, memory class, or memory pool in response to requests by the system (kernel memory allocation) or a user (application memory allocation). Through these methods memory is allocated more efficiently in a NUMA machine. For example, allocating memory on a specified node in a NUMA machine, such as the same node on which a process requiring the memory is running, reduces memory access time. Allocating memory from a specified memory class allows device drivers with restricted DMA ranges to operate with dynamically allocated memory. Other benefits of these methods include minimizing expensive remote-memory accesses using a distributed reference count mechanism and lock-free cache access.

Memory allocator for a multiprocessor computer system

Managing access control within system topologies by using canonical access control representations is disclosed. A set of accessor-accessible pairs is determined. Each accessor has a predetermined level of access to its paired accessible within a system topology. For each unique accessible within the set of pairs, the accessors that are paired with it are sorted and merged as a first proto-zone. For each unique subset of accessor(s) within the set of first proto-zones, the accessibles that are associated with it are sorted and merged as a second proto-zone. The second proto-zones are sorted to yield a canonical set of zones. Each zone has accessor(s) and accessible(s). The canonical set of zones is used to manage the access control of the accessors and the accessibles within the topology.

Managing access control within system topologies using canonical access control representations

Verifying that power line communication units () are properly coupled to power circuits () is disclosed. Each of a number of communication units () is coupled to one of one or more power circuits (), and sends an identifier over this power circuit. One or more management components () collect the identifier sent by each communication unit, and use at least these identifiers to verify that the communication units () are properly coupled to the power circuits ().

Verification of proper coupling of power line communication units to power circuits

A data structure adapted for storage in a computer memory for receiving executable instructions. The data structure is a modified binary tree in the form of a quaternary tree guaranteeing at least two of four way branching at each internal node. In addition to the binary nodes, the tree may comprise a wildcard node and/or an epsilon node. The wildcard nodes point at keys of arbitrary descendants, and epsilon nodes reference an end of a data string at a specific length. In addition to the data structure, a method of traversing the data structure is disclosed for searching and retrieving data stored thereon. A method of modifying the data stored on the data structure is also disclosed. The searching algorithms include flags for controlling the tightness of a search and filters for searching prefixes and suffixes of a string. In conjunction with traversing the tree, a method of modifying the data structure is disclosed. The modification process includes a insertion process for adding data to the data structure, and a deletion process for removing data from the data structure. Both the insertion and deletion processes maintain and guarantee the two of four way branching of the data structure. Accordingly, the novel data structure is designed to permit users to access the data structure at the same time as a modification is occurring.

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Aloha, OR, United States of America

Stuart A Friedberg