Applied Materials, Inc.

Cfmt, Inc.

Other

Mattson Technology, Inc

Applied Materials Italia S.r.l.

Steven Verhaverbeke

Roman Gouk

Han-Wen Chen

Kurtis Leschkies

Giback Park

Kyuil Cho

Jean Delmas

Wei-Sheng Lei

Guan Huei See

Majeed Foad

James S Papanu

Omkaram Nalamasu

Martin A Hilkene

Abhijit Basu Mallick

Robert Jan Visser

Peter I Porshnev

Li-Qun Xia

Brian J Brown

Christopher Dennis Bencher

Christopher F Lane

Pramit Manna

Sasson Roger Somekh

Visweswaren Sivaramakrishnan

Arvind Sundarrajan

Adolph Miller Allen

David Tanner

Prerna Sonthalia Goradia

Yu Gu

John M White

Nitin K Ingle

David P Thompson

Yan Ye

Daniel John Hoffman

Hong Peng Wang

Stephen Moffatt

Rutger Meyer Timmerman Thijssen

Jeffrey W Anthis

Jianshe Tang

Joseph R Johnson

Maitreyee Mahajani

Patricia M Liu

Ziqing Duan

Kaushal Kishore Singh

Vincent Dicaprio

Chintan Buch

J Kelly Truman

Giorgio Cellere

Diego Tonini

Matthew D Scotney-Castle

Rick Endo

Jeffrey L Franklin

Alexander S Ko

Christopher F McConnell

Mahalingam Venkatesan

Nety M Krishna

Tapash Chakraborty

Bernhard Stonas

Christopher L Beaudry

Kevin Vincent Moraes

Shishi Jiang

Prayudi Lianto

Alexander C Kontos

Jose Antonio Marin

Hien-Minh Huu Le

Dennis J Yost

Victor Pushparaj

Ho-Man Rodney Chiu

Philip A Greene

Suresh M Shrauti

Yong-Won Lee

Valery V Komin

Vladimir Zubkov

Jrjyan Jerry Chen

Mei-Yee Shek

Dong-Kil Yim

Boyi Fu

Brian Hayes Burrows

Keith Tatseun Wong

Jacob Newman

Malcolm J Bevan

Ruiping Wang

Tatsuya E Sato

Colin Costano Neikirk

Gerald N DiBello

Brian Saxton Underwood

Ronald Rayandayan

Fei Peng

Yu Jin

Eugene Smargiassi

John S Lewis

Pin Gian Gan

Xi Huang

C Wade Sheen

Ching-Hwa Weng

Kelly Truman

Kiran Krishnapur

Alan Walter

Lewis Liu

Charles F Trissel

Alex Hung

The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor device package. In certain embodiments, a glass or silicon substrate is patterned by laser ablation to form structures for subsequent formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor device package, which may have one or more embedded double-sided dies therein. In certain embodiments, an insulating layer is formed over the substrate by laminating a pre-structured insulating film thereon. The insulating film may be pre-structured by laser ablation to form structures therein, followed by selective curing of sidewalls of the formed structures.

Semiconductor device packages

The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.

High connectivity device stacking

The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

Package core assembly and fabrication methods

In an embodiment, a method of forming a blind via in a substrate comprising a mask layer, a conductive layer, and a dielectric layer is provided. The method includes detecting the mask layer by a sensor, the mask layer providing a substrate surface; determining a property of the blind via, the property comprising one or more of a top diameter, a bottom diameter, a volume, or a taper angle; focusing a Gaussian laser beam, under laser process parameters, at the substrate surface to remove at least a portion of the mask layer; adjusting the laser process parameters based on the property; and focusing the laser beam, under the adjusted laser process parameters, to remove at least a portion of the dielectric layer within the volume to form the blind via. The mask layer can be pre-etched. Apparatus for forming a blind via in a substrate are also provided.

Method and apparatus for laser drilling blind vias

The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration

Embodiments of the present disclosure generally relate to planarization of surfaces on substrates and on layers formed on substrates. More specifically, embodiments of the present disclosure relate to planarization of surfaces on substrates for advanced packaging applications, such as surfaces of polymeric material layers. In one implementation, the method includes mechanically grinding a substrate surface against a polishing surface in the presence of a grinding slurry during a first polishing process to remove a portion of a material formed on the substrate; and then chemically mechanically polishing the substrate surface against the polishing surface in the presence of a polishing slurry during a second polishing process to reduce any roughness or unevenness caused by the first polishing process.

Planarization methods for packaging substrates

An imprint lithography stamp includes a stamp body having a patterned surface and formed from a fluorinated ethylene propylene copolymer. The imprint lithography stamp further includes a backing plate with a plurality of through-holes with portions of the stamp body extending into the through-holes to adhere the stamp body to the backing plate. The patterned surface of the stamp body has a plurality of protrusions extending from the stamp body, which are used to form high aspect ratio features at high processing temperatures. A mold design for forming the imprint lithography stamp and an injection molding process for forming the imprint lithography stamp are also provided.

Fluoropolymer stamp fabrication method

The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.

Package structure and fabrication methods

The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.

Substrate structuring methods

A method for forming microvias for packaging applications is disclosed. A sacrificial photosensitive material is developed to form microvias with reduced diameter and improved placement accuracy. The microvias are filled with a conductive material and the surrounding dielectric is removed and replaced with an RDL polymer layer.

Methods of forming microvias with reduced diameter

Growing community of inventors

San Francisco, CA, United States of America

Steven Verhaverbeke