Lsi Logic Corporation

Ampex Corporation

Other

Auravision Corporation

Steven S Chan

Anthony Yap Wong

Scott A Kimura

Jayant Ratti

Daniel Wong

Miles S Simpson

Assemblies for creating graphic displays and art are disclosed. The assemblies include at least one vehicle that is capable of flight; a series of light emitting elements independently affixed to the vehicle or mounted to one or more radially extending elements; an axis around which the radially extending elements are configured to rotate; and at least one motor that is configured to cause the axis and the radially extending elements to rotate. Rotation of the radially extending elements generates a graphic display produced by the light emitting elements (through a 'persistence of vision' optical illusion). Methods of using such assemblies are also disclosed, such as methods for producing a graphic display (including aggregated graphic displays), methods for creating three-dimensional structures, and methods for camouflaging aerial vehicles and other objects.

Methods and devices for using aerial vehicles to create graphic displays and reconfigurable 3D structures

A multimedia video processor chip for a personal computer in employs a multi-port central cache memory to queue all the incoming data to be stored in a DRAM and all the outgoing data being retrieved from the DRAM. Such a cache memory is used in one of several modes in which the cache memory is partitioned by cache boundaries into different groups of storage areas. Each storage area of the cache is dedicated to storing data from a specific data source. The cache boundaries are chosen such that, for a given mode, the storage areas are optimized for worst case conditions for all data streams.

Flexible multiport multiformat burst buffer

A CMOS driver circuit for integrated circuits capable of operating in two modes. The first, high speed, mode allows the driver circuit on an integrated circuit device to drive the internal signals of the device to the outside world for standard operation of the integrated circuit devices. The second mode causes the driver circuit to behave as a weak driver for easily testing the integrated circuit.

Two-mode driver circuit

A circuit (40) constructed in accordance with this invention includes a ring oscillator (25) to provide a signal which is dependent on the propagation delays of the inverters (33, 34, 35) comprising the ring oscillator, therefore the frequency of the ring oscillator is inversely dependent upon the propagation delays of the inverter comprising the ring oscillator. Means (37) are provided to determine the propagation delay introduced by the components in the ring oscillator by measuring the frequency of the output signal produced by the ring oscillator which provides a signal to a multiplexer (36) which selects among a number of preset delay components (26) those components which are necessary to ensure that the propagation delay caused by the circuitry (not shown) connected to the input lead (21) of the circuit constructed in accordance with this invention plus the propagation delay introduced by the selectable delay elements is nearly a constant propagation delay.

Delay control circuit

In a system for comparing the ratio of two numbers to a threshold, the bits of each number are compared in groups comprising less than the total number of bits. The most significant group of bits are first compared, and if they contain sufficient information to make the comparison, the result thereof is indicated. If the most significant group of bits does not contain sufficient information, the comparison is made based upon the next higher order group of bits that does contain sufficient information. In some situations, it is desirable to obtain information about the next lower order group of bits in order to verify whether a determination is correct. Each of these situations has a unique address in a memory unit dedicated to the next lower order group of bits. In response to an input signal indicating that a determination subject to verification has been made, this memory unit provides an output signal that indicates the validity of the determination, based upon input information to this memory unit that is not contained in the higher order group of bits.

Ratio comparator for digital signals

A universal interface unit for providing output signals in any one of a plurality of different signal formats stores information relating to each of the different available formats. When signals are to be provided to a particular device, personality data regarding the device enables the particular signal format requirements of the device to be read from the stored information. A signal processor responsive to this information generates output signals in that format. The output signals are transmitted to the device through a switching circuit that is appropriately connected to the device to provide the proper polarity.

Universal interface unit

To decode a binary signal without regard to the speed at which it is read, each transition in the binary signal is detected, and the time lapse between successive transitions is determined to thereby establish the length of a pulse in the binary signal. The length of one pulse is compared with that of the immediately preceding bit cell to determine whether their lengths are approximately the same or vary by a factor of approximately 2. If the two compared lengths are approximately the same, it is recognized that there is no change in the information conveyed by the signal and therefore the binary state of the most recently detected pulse is representative of the previously established binary state of the signal. However, if the pulse has a duration of approximately one half that of the preceding bit cell, a change in the state of the binary information being conveyed is recognized, and an appropriate indication is provided to signal such change. A multiplexing technique is employed to simultaneously decode a number of signals in this manner.

Growing community of inventors

Fremont, CA, United States of America

Steven S Chan