Texas Instruments Corporation

Raytheon Company

Steven N Frank

Robert A Owen

James F Belcher

Robert J Kyle

Charles E Stanford

Charles M Hanson

Edward G Meissner

Gail D Shelton

William K Walker

Howard R Beratan

James E Robinson

Paul O Johnson

Scott Robert Summerfelt

Chang-Feng Wan

John P Long

Yingsheng Tung

James G Frank

Jeanee Jones

A thermal sensor (36, 84, 114) comprising a thermal assembly (44, 88, 118) and a signal flowpath (46, 90, 120). The thermal assembly (44, 88, 118) may comprise a thermally sensitive element (50) and a pair of electrodes (52, 54). The thermally sensitive element (50) may generate a signal representative of an amount of thermal radiation incident to the thermally sensitive element (50). The electrodes (52, 54) may collect the signal generated by the thermally sensitive element (50). The signal flowpath (46, 90, 120) may transmit the signal collected by the electrodes (52, 54) to the substrate (34, 82, 112). The signal flowpath (46, 90, 120) may comprise a pair of arms (56, 58, 92, 122) each extending from an electrode (52, 54) and be connected to the substrate (34, 82, 112). The arms (56, 58, 92, 122) may support the thermal assembly (44, 88, 118) in spaced relation with the substrate (34, 82, 112). The arms (56, 58, 92, 122) may be formed of a thermally insulating material.

Thermal isolation of monolithic thermal detector

This is a system and method of forming an electrical contact to the optical coating of an infrared detector. The method may comprise: forming thermal isolation trenches 22 and contact vias 23 in a substrate 20; depositing a bias contact metal 32 into the vias 23 forming biasing contact areas around a periphery of the substrate 20; depositing a first trench filler 24 in the trenches 22 and vias 23; replanarizing; depositing a common electrode layer 25 over the thermal isolation trenches and the biasing contact areas; mechanically thinning the substrate 20 to expose the biasing contact area 32 and the trench filler 24; depositing a contact metal 34 on the backside of the substrate 20, the exposed trench filler 24 and the exposed bias contact area; and etching the contact metal 34 and the trench filler 24 to form pixel mesas of the contact metal 34 and the substrate 20. The thermal isolation trenches 22 and the bias contact vias 23 may be formed by ion milling or laser vaporization. Alternately, the bias contact areas 23 may be formed by performing laser vaporization on the substrate 20 to produce conductive 23 areas within the substrate.

Method for forming electrical contact to the optical coating of an

This is a system and method of forming an electrical contact to the optical coating of an infrared detector. The method may comprise: forming thermal isolation trenches 22 in a substrate 20; depositing a trench filler 24 in the thermal isolation trenches 22; depositing a common electrode layer 31 over the thermal isolation trenches 22; depositing an optical coating 26 above the common electrode layer 31; mechanically thinning the substrate to expose the trench filler 24; etching to remove the trench filler 24 in the bias contact area; depositing a contact metal 34 on the backside of the substrate 20, wherein the contact metal 34 connects to the common electrode layer 31 at bias contact areas 34 around a periphery of the thermal isolation trenches; and etching the contact metal 34 and the trench filler 24 to form pixel mesas of the contact metal 34 and the substrate 20. Bias contact vias 23 may be formed in the bias contact areas and then filled with bias contact metal 49. Alternately, the bias contact vias may also be filled with the contact metal 34. The thermal isolation trenches may be formed by laser vaporization, ion milling or other equivalent methods. In addition, an elevation layer may be formed between the optical coating and the substrate to provide greater tolerances for ion milling. The elevation layer may be filled with a trench filler and then removed after milling. Alternately, the elevation layer may be filled with a metal 49 to connect the bias contact metal to the common electrode in the bias contact areas.

Infrared sensing device

This is a system and method of forming an electrical contact to the optical coating of an infrared detector using conductive epoxy. The method may comprise: forming thermal isolation trenches 22 and bias contact vias 23 in a substrate 20; depositing a trench filler 24 in the thermal isolation trenches 22; depositing conductive epoxy 50 into the bias contact vias 23; replanarizing; depositing a common electrode layer 31 over the thermal isolation trenches 22 and vias 23; depositing an optical coating 26 above the common electrode layer 31; mechanically polishing a backside of the substrate 20 to expose the trench filler 24 and conductive epoxy 50; depositing a contact metal 34 on the backside of the substrate 20; etching the contact metal 34 and the trench filler 24 to form pixel mesas of the contact metal 34 and the substrate 20.

A thermal detection system (10) includes a focal plane array (12), a thermal isolation structure (14), and an integrated circuit substrate (16). Focal plane array (12) includes thermal sensors (28), each having an associated thermal sensitive element (30). Thermal sensitive element (30) is coupled with one side to infrared absorber and common electrode assembly (36) and on the opposite side to an associated contact pad (20) disposed on the integrated circuit substrate (16). Reticulation kerfs (52a, 52b) separate adjacent thermal sensitive elements (30a, 30b, 30c) by a distance at least half the average width (44, 46) of a single thermal sensitive element (30a, 30b, 30c). A continuous, non-reticulated optical coating (38) may be disposed over thermal sensitive elements (30a, 30b, 30c) to maximize absorption of thermal radiation incident to focal plane array (12).

Method of fabricating focal plane array

A novel multiple level mask (e.g. tri-level mask 36) process for masking achieves a desired thick mask with substantially vertical walls and thus improves the ion milling process of ceramic materials (e.g. BST). An embodiment of the present invention is a microelectronic structure comprising a ceramic substrate, an ion mill mask layer (e.g. photoresist 42) overlaying the substrate, a dry-etch-selective mask layer (e.g. TiW 40) overlaying the ion mill mask layer, the dry-etch-selective mask layer comprising a different material than the ion mill mask layer, a top photosensitive layer (38) overlaying the dry-etch-selective mask layer, the top photosensitive layer comprising a different material than the dry-etch-selective mask layer, and a predetermined pattern formed in the top photosensitive layer, the dry-etch-selective mask layer and the ion mill mask layer. The predetermined pattern has substantially vertical walls in the ion mill mask layer.

Multiple level mask for patterning of ceramic materials

A thermal isolation structure (10) is disposed between a focal plane array and an integrated circuit substrate (12). The thermal isolation structure (10) includes a mesa-type formation (16) and a mesa strip conductor (18, 26) extending from the top of the mesa-type formation (16) to an associated contact pad (14) on the integrated circuit substrate (12). After formation of the mesa-type formation (16) and the mesa strip conductor (18, 26), an anisotropic etch using the mesa strip conductor (18, 26) as an etch mask removes excess mesa material to form trimmed mesa-type formation (24) for improved thermal isolation. Bump bonding material (20) may be deposited on mesa strip conductor (18, 26) and can also be used as an etch mask during the anisotropic etch. Thermal isolation structure (100) can include mesa-type formations (102), each with a centrally located via (110) extending vertically to an associated contact pad (104) of integrated circuit substrate (106). A conductor (108) is deposited on top of mesa-type formation (102), along the walls of via (110), and overlaying contact pad (104). An anistropic etch using the conductor (108) as an etch mask removes excess mesa material (118) for improved thermal isolation.

Thermal isolation of hybrid thermal detectors through an anisotropic etch

A system for infrared sensing has thermally sensitive picture elements within a substrate; bias contact areas within the substrate and around a periphery of the thermally sensitive picture elements; a common electrode on a front side of the thermally sensitive picture elements and the bias contact areas; an optical coating on top of the common electrode; a first electrical contact metal on a backside of the thermally sensitive picture elements; and a second electrical contact metal connected to the bias contact areas on a backside of the bias contact areas and electrically connected to the common electrode. The bias contact areas may include a conductive substrate area. In addition, the device may be connected to an integrated circuit by an ohmic connection to the first and/or the second electrical contact metal.

Electrical contact to the common electrode of an infrared detector array

A thermal isolation structure (10) is disposed between a focal plane array and an integrated circuit substrate (12). The thermal isolation structure (10) includes a mesa-type formation (16) and a mesa strip conductor (18, 26) extending from the top of the mesa-type formation (16) to an associated contact pad (14) on the integrated circuit substrate (12). After formation of the mesa-type formation (16) and the mesa strip conductor (18, 26), an anisotropic etch using the mesa strip conductor (18, 26) as an etch mask removes excess mesa material to form trimmed mesa-type formation (24) for improved thermal isolation. Bump bonding material (20) may be deposited on mesa strip conductor (18, 26) and can also be used as an etch mask during the anisotropic etch. Thermal isolation structure (100) can include mesa-type formations (102), each with a centrally located via (110) extending vertically to an associated contact pad (104) of integrated circuit substrate (106). A conductor (108) is deposited on top of mesa-type formation (102), along the walls of via (110), and overlying contact pad (104). An anisotropic etch using the conductor (108) as an etch mask removes excess mesa material (118) for improved thermal isolation.

Thermal detector apparatus and method using reduced thermal capacity

A thermal detection system (100, 200) includes a focal plane array (102, 202), a thermal isolation structure (104, 204) and an integrated circuit substrate (106, 206). The focal plane array (102, 202) includes thermal sensors (114, 214) formed from a pyroelectric element (116, 216), such as barium strontium titanate (BST). One side of the pyroelectric element (116, 216) is coupled to a contact pad (110, 210) disposed on the integrated circuit substrate (106, 206) through a mesa strip conductor (112, 212) of the thermal isolation structure (104, 204). The other side of the pyroelectric element (116, 216) is coupled to a common electrode (120, 220). In one embodiment, slots (128) are formed in the common electrode (120) intermediate the thermal sensors (114) to improve inter-pixel thermal isolation. In another embodiment, slots (236) are formed in the optical coating (224) to improve inter-pixel thermal isolation. The common electrode (120, 220) may be formed from a thermally insulating material, such as a silicon monoxide and chromium matrix (cermet) or other metal oxide.

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McKinney, TX, United States of America

Steven N Frank