Koninklijke Philips Corporation N.v.

U.S. Philips Corporation

Steven M Labram

Guy Mabboux

The invention relates to a circuit of which the operating rate varies according to temperature, supply voltage and intrinsic quality of the transistors of the circuit, associated to a compensating circuit which comprises a constant current source ( ) that produces a substantially constant current which is independent of temperature, supply voltage and intrinsic quality of the transistors of the circuit, a variable current source ( ) producing a current that increases in an inverse proportion to temperature, supply voltage and intrinsic quality of the transistors of the circuit, and means for decreasing the operating rate of the circuit when the difference of the currents produced by the first and second sources increases.

CMOS output amplifier independent of temperature, supply voltage and manufacturing quality of transistors

Output stage with self calibrating slew rate control. An output stage comprising a first (1) and a second (2) supply terminal for receiving a supply voltage (SV); a pre-drive circuit (PDS) coupled to an input terminal (IP) for receiving an input signal (V.sub.i), the pre-drive circuit (PDS) comprising a series transistor (TS) with a control electrode (TS.sub.g) for receiving a control voltage (V.sub.cntrl) for controlling a maximum current from an output (PDS.sub.OUT) of the pre-drive circuit (PDS), and a capacitor (C) for retaining the control voltage (V.sub.cntrl); an output-drive circuit (ODS) for delivering an output signal (V.sub.o) at an output terminal (OP) in response to the input signal (V.sub.i); and a control circuit (CC) for delivering the control voltage (V.sub.cntrl). The output stage further comprises a control circuit (CC) which is coupled between the output terminal (OP) and the control electrode (TS.sub.g). The pre-drive circuit (PDS) and the output-drive circuit (ODS) together form a non-inverting output stage. If the slew rate of the output signal (V.sub.o) is too large it will gradually be reduced by adapting the control voltage (V.sub.cntrl) The control circuit CC, the pre-drive circuit (PDS), and the output-drive circuit (ODS) together form a clocked feedback loop in order to automatically calibrate the slew rate of the output signal (V.sub.o) during a few clock cycles.

Output stage with self calibrating slew rate control

An output stage comprising an input terminal (IP) for receiving an input signal (V.sub.i); an output terminal (OP) for delivering an output signal (V.sub.o) in response to the input signal (V.sub.i); a first (1) and second (2) supply terminal for receiving a supply voltage (SV); a field effect transistor (Q1) comprising a gate (GN), and a main current path between a source and a drain coupled between the first supply terminal (1) and the output terminal (OP); and slewing control means (SCM) for reducing the speed of voltage change at the gate (GN) of the field effect transistor (Q1) for reducing the speed of current change through the main current path of the field effect transistor (Q1) when the output signal (V.sub.o) changes from a first steady state (FST) via a transition area (TRE) to a second steady state (SST). The slewing control means (SCM) comprises first means for reducing the gate-source voltage V(GN) between the gate (GN) and the source of the field effect transistor (Q1) in at least part of the transition area (TRE) when the field effect transistor (Q1) changes from a nonconducting state to a conducting state and thus causing the output signal (V.sub.o) to be changed from the first steady state (FST), via the transition area (TRE), to the second steady state (SST). The first means avoid the field effect transistor (Q1) to become out of saturation, and thus avoids an abrupt change of the current through the field effect transistor (Q1), thereby avoiding relatively large voltage spikes at the first supply voltage (SV) and/or the output signal (V.sub.o).

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Crolles, France

Steven M Labram