Burroughs, Inc.

Steven M Baldwin

Donald L Henderson, Sr

Joel A Karp

Stephen J Chan

Raymond Pong

A method of fabricating an integrated circuit having a plurality of different devices, which method employs a single mask to define the active areas of all such devices. A silicon oxide-silicon nitride layer is formed on the surface of a silicon wafer so as to define the location of subsequent oxide insulating layers which in turn actually define all the active areas of the circuit. Respective active areas for the different devices can then be formed by selective ion implantation.

Single mask method of fabricating complementary integrated circuits

An IGFET integrated circuit memory cell structure utilizing a capacitor with increased charge storage capability, and a method making the same. The capacitor includes a high impurity concentration region having the same conductivity type as the substrate. An island of opposite conductivity type is inset in the region and a conductive field plate overlies the island. The structure also includes a transfer transistor in which the source region is adjacent the capacitor and overlaps the island region therein. Activation of the transistor serves to transfer the charge stored in the capacitor to the drain region where it can be read by external circuitry. In the method, the high concentration region and island in the capacitor are formed by successive ion implantation steps. A subsequent source and drain diffusion causes lateral migration of the conductive portions of the cell to increase the storage capacitance and to insure electrical contact between the island region of the capacitor and the source of the transfer transistor.

IGFET integrated circuit memory cell

IGFET Integrated circuit memory cell

An MOS integrated circuit chip for both addressing and driving display devices in display panels. The chip includes low-level logic devices for receiving and manipulating data for energizing a selected number of devices in the display panel. An output driver portion is coupled to the display devices and energizes the devices in response to the data received by the input logic. The output driver portion includes a transistor in which the drain region extends deeper into the substrate than the source region of the transistor, as well as the remainder of the active regions in the integrated circuit chip. Accordingly, the integrated circuit chip can withstand a high breakdown voltage at its driver output, while also providing high density logic devices thereby minimizing discrete components and their associated separate electrical interconnections.

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San Diego, CA, United States of America

Steven M Baldwin