Tektronix, Inc.

Steven K Sullivan

Paul M Gerlach

Kristie L Veith

Kenneth P Dobyns

Terrance R Beale

Charles L Saxe

Roy I Siegel

Yasumasa Fujisawa

Raymond L Veith

Donald F Murray

Christopher W Branson

Iwao Akiyama

Daniel G Knierim

Josiah A Bartlett

Grigory Kogan

Gregory A Martin

Michael S Hagen

Samuel J Peters, Ii

Frederick A Azinger

Benjamin J McCarroll

John F Stoops

Joseph R Peter

Yukio Aizawa

Robert C Proebstel

George S Walker

Jeff W Yost

David P Maguire

Michael A Gauland

Jing-Fan Zhang

A waveform display apparatus and method displays one or more waveforms of a signal under test at high throughput while acquiring digital data of the signal under test in a large acquisition memory. A user sets a time interval of user's interest when viewing a signal under test and sets trigger criteria through a user interface. An ADC converts the signal under test into digital data that is stored in a large acquisition memory. A trigger unit detects and produces trigger events, based on a trigger, as trigger event information during one acquisition process. A trigger event eliminator may discard some of the trigger events based on pre-trigger and post-conditions set through the interface by a user. The trigger events are recorded in a trigger list as the trigger event information. A control unit locates the digital data in the acquisition memory corresponding to the trigger events in the trigger list and displays a waveform associated with the trigger event for the time interval on a display device.

High waveform throughput with a large acquisition memory

A fast rasterizer uses a fast memory that has a bit-set port for receiving data and a totally independent readout and clear port for outputting a waveform image. The fast memory is organized into rows and columns corresponding to the rows and columns of a raster display device, with each memory location or cell holding a single bit. The fast memory is divided into parallel sections so that one column of each section may be written into each clock cycle, resulting in the possibility of writing a plurality of columns into the fast memory each clock cycle. Each memory cell is set when a row and column write signal for the cell are asserted, and is read out and cleared when a row and column read signal for the cell are asserted. Row logic using thermometer codes is used to set the row lines for the selected column in each section.

Fast rasterizer

A test and measurement instrument and method for providing post-acquisition trigger control and presentation of associated waveforms on a display. An electrical signal under test is sampled and digitized, and stored in an acquisition memory as a data record. A display device draws a waveform associated with the signal under test. After the acquisition of the digital samples is stopped, a user selects trigger criteria using trigger controls such as a trigger level control. A trigger circuit detects a post-acquisition trigger event in the data record based on the trigger criteria causing an automatic adjustment of the waveform to conform to a time of the post-acquisition trigger event. One or more configurable trigger controls can be used to adjust a display of post-acquisition trigger events and waveforms. Upon resumption of the live-acquisition of data, the live waveform conforms to the newly selected trigger criteria as previewed during the post-acquisition mode.

Test and measurement instrument and method for providing post-acquisition trigger control and presentation

A method of drawing a waveform image in a no dead time acquisition system, where consecutive drawing frames overlap, uses a master/slave relationship between two fast rasterizers. The master rasterizer draws a first display frame in response to a first trigger event in a trigger signal derived from an input signal. The slave rasterizer draws a second display frame in response to a subsequent trigger event in the trigger signal. The portion of the second display frame that duplicates data contained in the first display frame is either (a) suppressed when the first and second display frames are combined to form the waveform image or (b) displayed in a different shade/color. Alternatively the first display frame may be compressed by 50% to form a first portion of the waveform image and the non-duplicative portion of the second display frame is compressed by 50% to form a second portion of the waveform image, the first and second portions being drawn contiguously when the first and second display frames are combined to form the waveform image.

Drawing waveforms in no dead time acquisition system

A waveform compression and display technique saves both a peak detected version (background version) and a decimated/lowpass filtered version (foreground version) of a sampled electrical signal. The two versions are displayed simultaneously overlaid together in a contrasting manner so as not to obscure information contained in either of them. The lowpass filtered version uses a series of simple lowpass filters with decimation to produce a single data stream from a plurality of data streams derived from the sampled electrical signal. The single data stream may then be subjected to additional filtering, such as a cascaded integrator-comb filter, to obtain a desired frequency bandwidth. When displayed, the peak detect pixels adjacent the decimated/lowpass filtered pixels may be adjusted in intensity so that the low frequency information of the lowpass filtered waveform is not lost, while the peak detect pixels further from the lowpass filtered pixels are intensified to highlight the high frequency information. Alternatively the background version intensity may be controlled by a user control over a first range from zero to a predetermined maximum, and the foreground version may be controlled over a second range from a default intensity to a maximum, saturated intensity.

Waveform compression and display

A multiple probe acquisition system, such as for use with a value instrument, uses probes where each probe includes an acquisition circuit for acquiring from a circuit under test an electrical signal as digital data at a high rate, and then transferring the digital data from the probe to the instrument at a lower rate over a data bus for processing and display. The probe may be used to acquire analog waveforms or logic data from the electrical signal. The probe provides a very low input capacitance to the circuit under test, minimizing signal distortion, and is relatively inexpensive. The probes are time aligned by detecting when one of the probes generates a trigger, and timing the other probes to stop acquisition simultaneously so the data is synchronized among the probes.

Multiple probe acquisition system

Deck support for flower pot

A self-adjusting hold-off trigger circuit and method detects a threshold crossing between consecutive samples of a digitized input signal as edge events, identifies the crossing as a qualified trigger event if the crossing is in a desired direction based upon trigger criteria, and provides a trigger output when the qualified trigger event occurs greater than an approximate average or peak time after a preceding edge event.

Self-adjusting hold-off trigger

Deck support for light

Deck support for torch

A 'no dead time' data acquisition system for a measurement instrument receives a digitized signal representing an electrical signal being monitored and generates from the digitized signal a trigger signal using a fast digital trigger circuit, the trigger signal including all trigger events within the digitized signal. The digitized signal is compressed as desired and delayed by a first-in, first-out (FIFO) buffer for a period of time to assure a predetermined amount of data prior to a first trigger event in the trigger signal. The delayed digitized signal is delivered to a fast rasterizer or drawing engine upon the occurrence of the first trigger event to generate a waveform image. The waveform image is then provided to a display buffer for combination with prior waveforms and/or other graphic inputs from other drawing engines. The contents of the display buffer are provided to a display at a display update rate to show a composite of all waveform images representing the electrical signal.

No dead time data acquisition

A data management method for a long record length memory that is used for data acquisition writes data samples into an initial circular buffer within the memory having a size equal to a pre-trigger time. When a first trigger event occurs, the data samples are then written into a linear region after the circular buffer within the memory. The data sample acquisition in the linear region continues until a post-trigger and new pre-trigger time have elapsed after a last trigger event, at which point the acquisition terminates and the new pre-trigger time becomes a new circular buffer for a next trigger event. In this way all trigger events are captured with associated pre-trigger and post-trigger data.

Data management in long record length memory

A mixed signal measurement instrument provides for the display of both analog and logic signal waveforms using a 'no dead time' architecture. For a logic signal all trigger events are detected, the logic signal is sampled at a high rate to produce a sampled logic signal data, the sampled logic signal data are delayed to provide a pre-trigger delay and then are drawn in real time in response to the detected trigger events. A FIFO is used to delay the sampled logic signal data, with the position of the trigger event on the display being determined coarsely by an effective depth of the FIFO. The sampled logic signal data may also be compressed into compression codes prior to the FIFO. A fast drawing engine receives the sampled logic signal data from the FIFO as either data samples or compression codes, and draws a logic waveform using four rows of the drawing engine memory&#x2014;one row for each of four logic states. The vertical position and height of the logic signal waveform on the display is determined when the logic waveform is transferred from the fast drawing engine to a conventional display buffer.

Mixed signal display for a measurement instrument

A logic analyzer having clock channels and data channels includes digitizer followed by a digital filter in each channel, the digital filter compensating for losses in signal fidelity in a signal under test. The resulting enhanced multi-bit samples are stored in respective waveform memories for subsequent display as analog waveforms and as logic data. The multi-bit samples from each channel are re-sampled by a regenerated sample clock to determine the logic values of the signal at precise times. For high speed serial data, each channel is divided into multiple clock channels and sampling channels, the outputs from the clock channels being phase adjusted to provide a precise sample clock to the sampling channels and the outputs from the sampling channels being combined to form a serial data output.

Logic analyzer using a digital filter

A test and measurement Instrument samples an input digital logic signal to produce logic samples, compresses the logic samples into compression codes, and stores the compression codes into acquisition memory. Compression includes parsing the logic samples into groups and assigning compression codes to those groups, and is performed so as not to lose information about the input digital logic signal's activity. The instrument converts the stored compression codes into a waveform image in display memory and displays the stored waveform image on a display device.

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Beaverton, OR, United States of America

Steven K Sullivan