International Business Machines Corporation

Steven Joel Diffenderfer

Hussain Shaukatullah

Stephen Wesley MacQuarrie

A semiconductor device package and method includes a thick, integrated circuit chip stack having a substantially planar bottom surface with a plurality of terminals. A carrier substrate is provided, also having a substantially planar surface, and being adapted to mount the chip stack. The substrate has a plurality of terminals and may preferably be made of a metallized ceramic. The terminals of the chip stack are adapted to be connected to the terminals of the substrate. Means are provided for mounting the chip stack on the substrate, as well as means for making electrical connections between the terminals of the chip stack and the terminals of the substrate. Finally, encapsulating means are used for supporting and maintaining the chip stack mounted on the carrier substrate. J leads connect the substrate to a circuit card.

Method of making interconnections between a multi-layer chip stack to a

Semiconductor device package including a thick integrated circuit chip

A method of making an electronic package. The method includes the step providing a leadframe of a single layer of material. The leadframe includes a semiconductor chip support, a plurality of signal leads, and a common ground portion substantially surrounding the chip support portion. A semiconductor chip having a plurality of signal sites and a plurality of ground sites is positioned on the semiconductor chip support of the leadframe. Selected ones of the signal sites of the semiconductor chip are selectively electrically connected to respective ones of the signal leads of the lead frame and selective ones of the ground sites of the semiconductor chip are selectively electrically connected to the common ground portion of the leadframe. Each of the signal leads of the leadframe are electrically isolated from each other and from the common ground portion of the leadframe.

Single layer leadframe design with groundplane capability

A method of making an electronic package including providing a leadframe of a single layer of material. The leadframe includes a semiconductor device support, a plurality of signal leads, and a common ground portion surrounding the device support portion. A semiconductor device having a plurality of signal sites and a plurality of ground sites is positioned on the semiconductor device support of the leadframe. Selected ones of the signal sites are connected to respective ones of the signal leads. Selective ones of the ground sites are connected to the common ground portion of the leadframe. Each of the signal leads are electrically isolated from each other and from the common ground portion of the leadframe.

Method for making single layer leadframe having groundplane capability

An electronic package including a leadframe that includes a single layer of an electrically conducting material, a semiconductor chip support, a common ground portion surrounding the semiconductor chip support and electrically connected thereto, a plurality of signal leads electrically isolated from each other and from the common ground portion, and a plurality of ground leads electrically connected to the common ground portion. A semiconductor chip including a plurality of signal sites and a plurality of ground sites is mounted on the semiconductor chip support of the leadframe. A plurality of electrical connections are provided between selected ones of the signal sites to respective ones of the signal leads and between selected ones of the ground sites to respective ones of the ground leads. A protective enclosure is provided substantially about the semiconductor device, the semiconductor chip support, the common ground portion of the leadframe, and at least a portion of the signal leads.

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Deposit, NY, United States of America

Steven Joel Diffenderfer