Bae Systems Information and Electronic Systems Integration Inc.

Other

Loral Federal Systems Company

Steven J Wright

Keith K Sturcken

Tushar T Shah

Frederick T Brady

Andrew T Pomerene

Nadium F Haddad

Krista J Wright

Charles P Breiten

William G Houston

Oliver S Spencer

Presented is a rail track cleaner vehicle configured for cleaning rail area. The rail track cleaner vehicle includes a wheel assembly, a main frame, a liquid sprayer assembly, an air blower assembly, a vacuum assembly and an electric motor assembly. The rail track cleaner vehicle comprises a plurality of optical camera to capture real time image of the rail area. The rail track cleaner vehicle efficiently and effectively clean the rail area and enables a remote personnel to inspect the cleaning process. The rail track cleaner vehicle substantially reduces manual labor and effort to clean the rail area.

Rail track cleaner vehicle

A housing forms an enclosed chamber. A container essentially fills the chamber is fabricated of a crinkle paper or like material adapted to produce a crackling and rustling sound when touched and manipulated by a user. A plurality of objects within the container are fabricated of a rigid material adapted to provide a three dimensional shape to the container and the housing for facilitating the movement of the crinkle paper or like material when manipulated by the user for creating a sound which will attract game during use.

Game calling device

A method of forming a plurality of micro column interconnection structures on a semiconductor includes providing a semiconductor layer. A photoresist layer is formed on the semiconductor layer. A plurality of cavities are etched in the photoresist layer. The plurality of cavities extend through the photoresist layer to the semiconductor layer. Solder is deposited in the plurality of cavities, thereby forming a plurality of micro columns of solder.

Method for forming a micro column grid array (CGA)

Methods for manufacturing microchips are provided. A plurality of alternating metallic wiring-layers and non-metallic layers, terminating with a metallic wiring-layer, are formed on a wafer. A plurality of vias is formed for electrically interconnecting various metallic wiring-layers. A plurality of electrically conducting pads is formed adjacent various vias. A passivation layer is formed adjacent the terminal metallic wiring-layer and the plurality of conducting pads. A portion of the passivation layer is removed to expose the plurality of conducting pads. A layer is formed adjacent the passivation layer and the plurality of exposed conducting pads for protecting the microchip against electromagnetic radiation. A portion of the protective layer is removed to expose the plurality of conducting pads. Each conducting pad is electrically isolated from the protective layer. An electrically conducting bump is formed on each conducting pad.

Insitu radiation protection of integrated circuits

A microchip having a passivation layer on an electrically active surface; a multitude of electrically conducting protuberances for electrically coupling the active surface to a substrate; a layer on the passivation layer for protecting against electromagnetic radiation; and a layer on an electrically inactive surface of the microchip for protecting against electromagnetic radiation.

A process to form poly sidegate LDD structures on buried channel MOSFETs is described. A polysilicon spacer is formed on the gate after source/drain processing. The spacer is later shorted to the main gate by implantation of neutral impurities. The process is particularly suited for SOI technology.

Growing community of inventors

Fredericksburg, VA, United States of America

Steven J Wright