Texas Instruments Corporation

Steven J Wallace

LaVaughn F Watts, Jr

Paul R Culley

Paul L Culley

An apparatus having a processing unit and a monitor for monitoring activity associated with said processing unit. The monitor enables selective lowering of the frequency of clock signals, or stopping and starting of clock signals, being received by said processing unit in response to a changing level of activity associated with said processing unit.

Processor having real-time power conservation

A method for providing power conservation in a processor in which, depending on the respective embodiment, a relative amount of idle time, activity time, or idle time and activity time associated with the processor are measured or detected, results of the measuring being used by the processor for controlling a clock speed. Yet other embodiments disclose, depending upon the respective embodiment, a relative amount of Input/Output (I/O), relative importance of Input/Output (I/O), and/or relative amount of time between Input/Output (I/O), associated with the processor are measured, results of the measuring being used by the processor to control power dissipation associated with the processor.

Method for providing real-time power conservation in a processor

A method for controlling power consumption associated with a processor in which, depending on the respective embodiment, a relative amount of idle time, activity time, or idle time and activity time associated with the processor are measured or detected, results of the measuring being used by the processor for controlling a clock speed.

Method for controlling power consumption associated with a processor

A processor, comprising a monitor for, depending on the respective embodiment, measuring a relative amount of idle time, activity time, or idle time and activity time associated with the processor, results of the measuring being used by the processor for controlling a clock speed. Yet other embodiments disclose, depending upon the respective embodiment, a processor, comprising a monitor for measuring the relative amount of Input/Output (I/O), relative importance of Input/Output (I/O), and/or relative amount of time between Input/Output (I/O), associated with the processor, results of the measuring being used by the processor to control power dissipation associated with the processor.

A processor, comprising a monitor for, depending on the respective embodiment, measuring the relative amount of idle time, activity time, or idle time and activity time within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor. Yet other embodiments disclose, depending upon the respective embodiment, a processor, comprising a monitor for measuring the relative amount of idle time, activity time or idle time and activity time within the processor, results of the measuring being used by the processor to control power dissipation associated with the processor.

A processor, comprising a monitor for measuring the relative amount of idle time within the processor, results of the measuring being used by the processor, depending upon the respective embodiment, to modify processor clock speed in response to a utilization percentage of the processor being below a preselected level, or to modify a clock speed of the processor to control a utilization percentage of the processor. Another embodiment discloses a processor, comprising a monitor for measuring the relative amount of idle time within the processor, results of the measuring being used by the processor for providing a signal for circuitry for controlling periods of time a processor clock is in an OFF state, the length of the periods of time said clock is in an OFF state being appropriate to allow the processor to operate at an efficient utilization percentage.

A processor, comprising a monitor for measuring the relative amount of Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor. Another embodiment discloses a processor, comprising a monitor for measuring the relative importance of Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of said processor. Still another embodiment discloses a processor, comprising a monitor for measuring the relative amount of time between Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor.

A real-time power conservation apparatus and method for portable computers employs a monitor to determine whether a CPU may rest based upon a real-time sampling of the CPU activity level and to activate a hardware selector to carry out the monitor's determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time; if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level. Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a &ldquo;ready&rdquo; state. Furthermore, the monitor adjusts the performance level of the computer to manage power conservation in response to the real-time sampling of CPU activity. Such adjustments are accomplished within the CPU cycles and do not affect the user's perception of performance and do not affect any system application software executing on the computer.

Real-time power conservation for electronic device having a processor

A real-time power conservation apparatus and method for portable computers employs a monitor to determine whether a CPU may rest based upon a real-time sampling of the CPU activity level and to activate a hardware selector to carry out the monitor's determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time; if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level. Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a 'ready' state. Furthermore, the monitor adjusts the performance level of the computer to manage power conservation in response to the real-time sampling of CPU activity. Such adjustments are accomplished within the CPU cycles and do not affect the user's perception of performance and do not affect any system application software executing on the computer.

Real-time power conservation for computers

Real time power conservation for computers

A method of dynamically interfacing an application processor with a plurality of peripheral ports is shown, including the use of an expanded memory interface for controlling a plurality of memory components for an application processor external to the interface. The application processor is connected to the expanded memory interface, which is in turn coupled to at least one status port to facilitate communication between the application processor and the status port.

Method and apparatus for dynamically interfacing with a plurality of

An expanded memory interface is shown including an expanded memory controller for controlling a plurality of memory components for an application processor external to the interface. The application processor is connected to the expanded memory controller, which is in turn coupled to at least one status port for communication between the application processor and an external processor. At least one of the status ports are coupled to the external processor which uses such status port as an interrupt register for indicating status changes to the application processor.

Growing community of inventors

Temple, TX, United States of America

Steven J Wallace