Hewlett-packard Company

Hewlett Packaged Company

Steven J Jahr

Todd A Fischer

Kevin N Smith

Harold C Ockerse

Thomas Stanley Gale

James G Wendt

Patrick W Fulghum

Scott D Bonar

Patrick A Bueb

A peripheral device (such as a printer) locates shareable resources on an accessory by using an offset mechanism on the accessory. The offset mechanism includes one or more offset values stored in a first memory location on the accessory. The one or more offset values are indicative of offsets of one or more resources within the accessory memory. The one or more accessory resources are shareable with the peripheral device. A further offset value is stored in a second memory location on the accessory. The further offset value is indicative of an offset for determining the first memory location on the accessory. Additionally, a base address is stored in yet another memory location on the accessory and provides a general reference point for locating the first memory and accessory resources as mapped into the peripheral's memory. In a preferred embodiment, the offset mechanism of the present invention is implemented as an enhanced feature of the PCI Local Bus Specification. For example, the first memory location is disposed in the PCI defined Memory Address Space of the accessory, and the second memory location and base address are both disposed in the PCI defined Configuration Address Space of the accessory. Advantageously, the present invention enables a peripheral device to locate resources on an accessory without knowing in advance where the resources are located on the accessory.

Accessory based resource offset mechanism for a PCI bus in a printer

A peripheral system includes (a) a peripheral device having peripheral memory located thereon, (b) at least one input/output (I/O) card communicating with the peripheral device, and (c) a means for managing the peripheral memory between the peripheral device and the at least one I/O card. In a preferred embodiment, the means for managing the peripheral memory includes (a) a means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) a means for allocating, during normal operation, the optimum amount of peripheral memory to each I/O card. A preferred method for managing memory, between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card, includes (a) determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) allocating, during normal operation, the optimum amount of peripheral memory to each I/O card.

Dynamic peripheral control of I/O buffers in peripherals with modular I/O

Atomic list insertion is provided for multi-master bus operation where masters use different sized bus transactions that require special management techniques to prevent interleaved accesses from returning invalid data. The update of a list entry. Next field is made an atomic operation, where atomic is defined as indivisible. To this end, the list entry. Next field is subdivided into two parts and a terminator list entry is provided.

Single-operation list entry update method in mixed bus environments

Growing community of inventors

Granite Bay, CA, United States of America

Steven J Jahr