Intel Corporation

Steven J Brown

Adrian R Pearson

Peter Munguia

Christopher Andrew Thornburg

A disclosed example involves managing power states, signing a suspend-to-RAM (STR) data structure by: generating a header key, a scatter/gather table key and a dynamic random access memory (DRAM) key using a root key generated by the secure processor. Generating a header signature using the header key, the header signature based on a table header and a random or pseudo-random value. Generating a scatter/gather table signature using the scatter/gather table key, the scatter/gather table signature based on a scatter/gather table header and a random or pseudo-random value. Generating a DRAM signature using the DRAM key and a value from a region of DRAM. Storing the header signature, the scatter/gather table signature and the DRAM signature in the STR data structure. Resume the processor system from the low-power mode when the data structure is valid based on a comparison of a first signature and a second signature.

Methods and apparatus to protect memory regions during low-power states

A disclosed example method involves configuring a processor to, when transitioning the processor system to a low-power mode, use a key and a random or pseudo-random value to generate a first signature based on a sample of memory regions to be protected during the low-power mode, the memory regions based on a manufacturer required regions table and a third-party required regions table. The disclosed example method also involves configuring a processor to, during a resume process of the processor system from the low-power mode, generate a second signature based on the sample of the memory regions protected during the low-power mode. The disclosed example method also involves configuring a processor to, when the first signature matches the second signature, cause the processor system to resume from the low-power mode, and when the first signature does not match the second signature, generate an error.

A disclosed example method involves when transitioning a processor system to a low-power mode, generating at least a first signature based on a data structure storing memory addresses of memory regions to be protected during the low-power mode. During a resume process of the processor system from the low-power mode, at least a second signature is generated based on the data structure storing the memory addresses of the memory regions to be protected during the low-power mode. When the first signature matches the second signature, the processor system resumes from the low-power mode. When the first signature does not match the second signature, an error is generated.

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Phoenix, AZ, United States of America

Steven J Brown