Cirrus Logic Inc.

Steven Green

John L Melanson

Xiaofan Fei

Johann Guy Gaboriau

Jason Powell Rhode

Zhong You

Wilson E Taylor, Jr

Scott Allan Woodford

Eric Walburger

Dylan Alexander Hester

A thermal sensor at the output of a switching amplifier senses heat dissipation at the output switch. If an overheating condition is sensed, gain of the digital input signal is lowered to reduce output power of the audio output signal.

Thermal feedback for switch mode amplification

A numerically-controlled phase-lock loop with input clock dependent ratio adjustment provides for narrower-bandwidth loops that lock to a wide range of frequencies and/or operation with an absent or degraded input timing reference. A timing reference characteristic detector determines an input frequency range of the input timing reference signal, the data type of the timing reference, and/or whether a timing reference signal of sufficient quality is present. A numerically controlled oscillator is controlled by a numeric ratio that is adjusted to provide the desired clock frequency output in conformity with the detected frequency range and/or data type. If the timing reference signal is absent or degraded, then the numeric ratio can be set to a fixed value or a local timing reference can be applied in order to generate the desired clock output frequency.

Numerically-controlled phase-lock loop with input timing reference-dependent ratio adjustment

A hybrid analog/digital phase-lock loop for low-jitter synchronization provides a mechanism for generating a low-jitter clock from a timing reference that has a high jitter level. A numerically-controlled analog oscillator provides a clock output and has an input for receiving a rational number. The rational number represents a ratio between the frequency of the clock output and the frequency of another stable clock provided to the circuit. A counter divides the frequency of either the clock output or the stable clock, providing feedback or feed-forward control of the analog oscillator, respectively. The circuit also includes a digital phase-frequency detector for detecting an on-going phase-frequency difference between an input timing reference and an output of the divider and a digital loop filter for filtering the output of the phase-frequency detector to provide the rational number that controls the frequency of the numerically-controlled analog oscillator.

Hybrid analog/digital phase-lock loop for low-jitter synchronization

Methods and Apparatuses are provided for automatically converting a word length of sample data being transmitted over a serial link. A serial interface transmits and/or receives one or more data words comprising digital signals, a bit clock synchronizes transmission of individual bits, and a word clock is used to group the bits into sample words. A desired word length is determined based on the relationship between the bit clock and the word clock during the transmission or reception of a data word. Based on the desired word length, the sample data is either truncated or padded, and an appropriate amount of dither is added to the sample words to reduce the distortion and quantization artifacts introduced by the word length conversion.

Method and apparatus for automatic word length conversion

A gain control at the input monitors an input signal and a supply voltage, which drives an output. The gain control adjusts the gain to compress the input signal when the supply voltage decreases in magnitude and/or the input signal is of such magnitude to cause the supply voltage to decrease.

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Austin, TX, United States of America

Steven Green