Texas Instruments Corporation

Steven Graham Brantley

Srinivas Kumar Pulijala

Bharath Karthik Vasan

Martijn Fridus Snoeij

Vadim Valerievich Ivanov

Francesco Cavaliere

James Richard MacLean

Sergey V Alenin

Ricky Dale Jordanger

Munaf Hussain Shaik

Srikanth Gondi

John Lawrence Caldwell

Bhuvanesh Radhakrishnan Kulasekaran

Vinodh K Nalluri

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

High voltage output stage

In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

Differential amplifier including cancellation capacitors

A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.

Voltage-to-current converters

An operational amplifier includes an input stage configured to receive a first input voltage and a second input voltage and a slew boost circuit coupled to the input stage and configured to selectively increase current through the input stage. The operational amplifier also includes an output stage coupled to the input stage and configured to generate an output voltage, and a slew boost disable circuit configured to assert a control signal to the slew boost circuit to disable the slew boost circuit. The slew boost circuit is disabled when both: the first input voltage being more than a first threshold voltage different from the second input voltage and the output voltage failing to change by more than a second threshold rate.

Slew boost disable for an operational amplifier

An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.

Distributed pole-zero compensation for an amplifier

A voltage-to-current converter includes a first differential pair of transistors, a second differential pair of transistors, and a first resistor. The first differential pair of transistors includes a first transistor and a second transistor. An emitter of the first transistor is directly connected to an emitter of the second transistor. The second differential pair of transistors includes a third transistor and a fourth transistor. An emitter of the third transistor is directly connected to an emitter of the fourth transistor. The first resistor is connected to the emitter of the first transistor, the emitter of the second transistor, the emitter of the third transistor, and the emitter of the fourth transistor.

System and method for improving total harmonic distortion of an amplifier

At least some embodiments are directed to a system comprising an amplifier containing a first bias current source and configured to provide an output voltage at a node, a gain stage coupled to the node and comprising a second bias current source, and a buffer stage coupled to the node and comprising third and fourth bias current sources and an additional set of bias current sources, the third and fourth bias current sources are able to activate output transistors that are configured to increase current provided to a load. The system also comprises a controller configured to activate the first bias current source, to activate the second bias current source after the first bias current source is activated, to activate the bias current sources in the set after the first bias current source is activated, and to activate the third and fourth bias current sources after the first and second bias current sources are activated and after the bias current sources in the set are activated.

Mitigating amplifier pop noise

A circuit and method for an audio op-amp that is configured to minimize crossover distortion between push and pull components of the audio op-amp. The audio op-amp includes an input stage that receives differential input signals and generates an output that amplifies the difference between the input signals. The audio op-amp further includes an output stage that receive the amplified signal and generate an audio output signal for playback by a speaker system. The output stage includes a diamond driver circuit that buffers the input stage from the speaker system, a boost circuit that includes a pair of boosting transistors that amplify the current of the amplified signal, and a biasing circuit that provides bias currents to the transistors of the boost circuit in a manner that minimizes crossover distortion between the boosting transistors.

Low distortion output stage for audio amplifiers

A differential input circuit (FIG.A) is disclosed. The circuit includes a first input terminal (drain of) and a second input terminal (drain of). A first input transistor () has a first control terminal and has a current path coupled to the first input terminal. A second input transistor () has a second control terminal and has a current path coupled to the second input terminal. A third transistor () has a third control terminal and has a current path between a first differential input terminal (Vin+) and the first control terminal. A fourth transistor () has a fourth control terminal and has a current path between a second differential input terminal (Vin&#x2212;) and the second control terminal.

High voltage input circuit for a differential amplifier

One example includes an amplifier system. The system includes a precision amplifier portion comprising a first input stage configured to receive an input voltage and a first output stage configured to generate an output voltage at the first output stage based on the input voltage. The system also includes a slew amplifier portion arranged in parallel with the precision amplifier portion and comprising a second input stage that receives the input voltage and a second output stage. The slew amplifier portion can be activated in response to a detected slew condition associated with the input voltage to generate the output voltage based on the input voltage.

Amplifier system

An operational amplifier () capable of driving a capacitive load (C) and/or a resistive load (R) includes a first gain stage () having an output coupled to a high impedance node () and a second gain stage () having an input coupled to the first high impedance node. A gain reduction resistor (R) and an AC coupling capacitor (C) are coupled in series between the high impedance node and a reference voltage. A Miller feedback capacitor (C) is coupled between an output conductor () of the second gain stage and the high impedance node. The output of the second gain stage may be coupled to the high impedance node by a cascode transistor (M).

Compensation circuitry and method for amplifiers driving large capacitive loads

One embodiment of an apparatus for generating a time stamp includes a clock input, an event signal input and a time stamp output. A DLL is connected to the clock input, with a plurality of delay elements inside the DLL. An output of each of the delay elements is connected to a data input on a latch. An event signal input is connected to an enable input on each of the latches. An output of each of the latches is connected to the time stamp output. The apparatus is adapted to produce a value on the time stamp output indicating a point at which the event signal input transitions between transitions on the clock input.

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Satellite Beach, FL, United States of America

Steven Graham Brantley