Texas Instruments Corporation

Steven E Sparks

Alan Scott Hearn

Virgilio N Garcia

A GaAs register for storing of digital data is configured with a plurality of 'D' type flip-flops having a data terminal and an enable terminal connected to an enabled GaAs clock circuit. The enabled GaAs clock circuit provides a load clock signal to enable the 'D' type flip-flops during the loading of data into the plurality of 'D' type flip-flops and to prohibit the loading of data without the load clock signal. The enabled GaAs clock circuit has 'D' type flip-flop, a clock input circuit and a combining circuit. The clock input circuit receives a clock signal and delays the clock signal. The 'D' type flip-flop loads the load enable signal with the rising edge of the clock signal and the delayed clock signal and the loaded enable signal are combined to obtained a combination signal which is used to load data into the plurality of 'D' type flip-flops in the register.

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Garland, TX, United States of America

Steven E Sparks