Texas Instruments Corporation

Steven Derrick Clynes

Karl H Renner

Liming Xiu

Weider Peter Chang

Zhiliang Julian Chen

Ramesh Chandrasekaran

Jason Meiners

Paul Arthur Gingrich

Anli Liu

Darian Robert Peter Sale

Xiaochuan Guo

Hrishikesh Shinde

Shing Fu Pang

Victor Xi Yang

Mandeep Singh Deol

Andrew Edward Waterson

Paul Ian Strathdee Marshall

Kevin Chalmers

This invention is a signal input/output design tool for integrated circuit input/output design. The connectivity capacity of at least multiplexer connecting internal signals and external lines is expressed as a first set of Boolean expressions. The desired connectivity between internal signals and external lines is expressed is provided by a designer. A programmed general purpose computer expresses the desired connectivity as a second set of Boolean expressions and determines whether said first set of Boolean expressions and said second set of Boolean expressions are Boolean satisfiable. If satisfiable, the design tool generates control signals to configure the at least one multiplexer to achieve the desired connectivity. If not satisfiable, the design tool generates a report indicating which portions of the desired connectivity are achievable and which are not.

Device pin mux configuration solving and code generation via Boolean satisfiability

A video display system, such as useful in video surveillance applications, is disclosed. The system includes a video decoder () having a common output data port () at which it presents interleaved data streams (DSA, DSB). The interleaved data streams (DSA, DSB) may correspond to multiple scalings of a processed video input signal, for example as received from a surveillance camera (C, C, C, C). The video decoder () also outputs multiple clock signals (CLKA, CLKB), each of which are synchronous with a corresponding one of the interleaved data streams (DSA, DSB). This enables a common data port () to output multiple data streams (DSA, DSB), while individual destinations (A,B) of the data streams (DSA, DSB) can continue to operate at legacy clock rates.

Clocked output of multiple data streams from a common data port

A digital video system () is disclosed, in which an analog input video signal is sampled at an optimum sample phase (P), and converted to a digital datastream for display. A phase-locked loop () generates a plurality of sample clock phases. One of the sample clock phases (P) is applied to an analog-to-digital converter (), which digitizes the analog input video signal accordingly. Phase alignment circuitry () is provided that includes three sample-and-hold circuits () that sample the analog input video signal, in parallel with the analog-to-digital converter (), at times before, at, and after the current sample clock phase used by the analog-to-digital converter (). The earlier and later sampled voltages are compared against the current sampled voltages to generate difference voltages that are each compared against a threshold voltage (V). The numbers of times that the difference voltages exceed the threshold voltage over a field or frame is analyzed according to various techniques, to determine whether and in which direction to adjust the position of the current sample clock phase within the pixel period.

Optimized phase alignment in analog-to-digital conversion of video signals

An electronic device (). The device comprises an analog () interface for receiving an analog waveform. The device also comprises an image screen () and circuitry () for at times displaying an image on the image screen in response to at least a portion of the analog waveform. The device also comprises a memory () for storing firmware code and circuitry () for at times writing firmware code in the memory in response to at least a portion of the analog waveform.

Updating embedded firmware in a video system

Systems and method are provided for luma-chroma separation. A demodulator system demodulates a composite video signal to produce at least two baseband chroma signals. A given baseband chroma signal contains chroma information for one of a plurality of video frames comprising the composite signal. A three-dimensional (3-D) comb filter removes luma information from a given baseband chroma signal by combining sets of at least two baseband chroma signals to form a 3-D filtered baseband signal.

Systems and methods for separating luma and chroma information in a composite video signal

The pixels of an image sensor array can be readout ( ) in m&times;n blocks (m, n) that are compatible with the operation of a desired image compression algorithm ( ), thereby reducing the amount of memory required by the image compression algorithm.

Image sensor array readout for simplified image compression

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Allen, TX, United States of America

Steven Derrick Clynes