Emc Corporation

Emc IP Holding Company LLC

Steven D Sardella

Stephen Edward Strickland

Mickey Steven Felton

Bernard Warnakulasooriya

Douglas Sullivan

Robert W Beauchamp

Ralph C Frangioso, Jr

Walter A O'Brien, Iii

Thomas J Connor

Bassem N Bishay

Jeffrey Alan Brown

Joseph P King

John Victor Burroughs

Thomas N Dibb

Phillip John Roux

Jason J Leone

Robert P Valentine

David W Harvey

Lawrence J Feroli

Douglas E Peeke

James W Espy

Amnon Izhar

Patrick J Weiler

Robert M Beauchamp

Timothy Dorr

Maida Boudreau

Antonio Fontes

Brian K Bailey

Brandon Barney

Geoffrey A Reid

Paul Anton Shubel

Alex J Sanville

Dennis Mazur

Michael A Faulkner

Kenneth M Sullivan

Walter O'Brien

James Creighton Tryhubczak

Adrianna D Bailey

Andrew P Kubicki

Timothy D Sykes

Darrin Haug

John Phinney

Joseph Perry

Philip J Roux

Joseph B Shimkus

Keith A Morrissette

Alan McIlvene

Keith A P Morrissette

A storage system in one embodiment comprises at least one processor, a processor memory, an input-output controller, and a directly-addressable storage device having volatile memory and non-volatile memory. The input-output controller generates a plurality of write commands in conjunction with storage of data in the storage system, the write commands including at least a first write command comprising the data and a second write command comprising one or more interrupts. If an address of a given one of the write commands falls within a specified interrupt group window, the write command is copied to the directly-addressable storage device so as to provide at least one of the one or more interrupts to that storage device. The directly-addressable storage device responds to receipt of the interrupt by writing data from the volatile memory to the non-volatile memory and generating a corresponding additional interrupt to the processor.

Storage system with data durability signaling for directly-addressable storage devices

A method includes obtaining instructions at a mobile device comprising directions from a current location of the mobile device to a target location in a facility over a path identified by two or more waypoint devices distributed in the facility, receiving signaling over at least one wireless network from a selected one of the waypoint devices in the path, utilizing a radio frequency signal strength of the received signaling to estimate proximity between the mobile device and the selected waypoint device, presenting an indication of proximity to the first waypoint device via the mobile device based at least in part on the estimated proximity, determining whether the estimated proximity between the mobile device and the selected waypoint device is below a proximity threshold, and selecting another one of the waypoint devices in the path responsive to determining that the estimated proximity is below the proximity threshold.

Waypoint-assisted navigation of an enterprise facility

An electronic assembly perform data storage operations on behalf of a set of storage processors (SPs). The electronic assembly includes an enclosure, and a set of peripheral component interconnect express (PCIe) switches which installs within the enclosure. The set of PCIe switches is constructed and arranged to connect to the set of SPs while the set of SPs is external to the enclosure. The electronic assembly further includes a set of data storage devices which installs within the enclosure. The set of data storage devices is constructed and arranged to persistently store data on behalf of the set of SPs via PCIe-based communications through the set of PCIe switches.

Provisioning an enclosure with PCIe connectivity and storage devices

A method performed by a storage system includes a first storage processor performing input/output (IO) requests on a first one or more logical units, and a second storage processor performing IO requests on a second one or more logical units. If the first storage processor fails, the third storage processor performs the IO requests on the first one or more logical units. If the second storage processor fails, the fourth storage processor performing the IO requests on the second one or more logical units.

Storage system performance recovery after storage processor failure

A storage network includes at least one storage processor. At least one switch is coupled to the at least one storage processor. At least one nontransparent bridge is coupled to the at least one switch. The at least one nontransparent bridge includes at least one addressable endpoint. At least one storage device is coupled to the nontransparent bridge. At least one baseboard management controller is coupled to the at least one addressable endpoint.

BMC-based communication system

A method, computer program product, and computing system for receiving, on a baseboard management controller coupled to an addressable endpoint of a non-transparent bridge included within a storage network, a plurality of condition messages concerning one or more components of the storage network. The plurality of condition messages are filtered into critical condition messages and noncritical condition messages.

Method for caching data

A data storage system includes a first storage processor including a first memory device; a second storage processor including a second memory device; and a third memory device coupled to the first storage processor and the second storage processor. The first and second storage processors are interconnected to enable mirroring of data between the first memory device and the second memory device. During a first mode of operation, data processed by the first storage processor and the second storage processor is mirrored between the first memory device and the second memory device and, during a second mode of operation, data processed by the first storage processor is mirrored from the first memory device to the third memory device.

System for caching data

A data storage system having a pair of CPU modules each one of having a port coupled to a host computer/server and a storage medium for transferring data during an IO transfer. Each one of the modules produces different types of reset signals, one of such types being a software reset signal produced during a software upgrade of the module and other types being produced for events other than during a software upgrade, The other types produced by a first one of the modules disables the port of the first one of the modules; whereas, in response the software reset signal produced by the first one of the modules during an IO transfer, a second one of the modules couples the port of the first one of the modules to the second one of the modules to enable the IO transfer to be processed by the second one of the modules.

Data storage systems having seamless software upgrades

Flow control settings are configured. Credit settings for credit types of input/output interconnect ports are programmed at a low value. The system type of a system containing the input/output interconnect ports is detected. The credit settings are reprogrammed in accordance with the system type.

Configuring flow control settings

Described is an electronics system and method for marking and faulting I/O ports of an I/O module in the electronics system. Each I/O port has an associated light-emitting system that is capable of emitting a plurality of different colors. At least one color is blinked at a first rate to produce a first status indicator for the I/O port. Each color of the different colors is alternately blinked at a second rate to produce a second status indicator for the I/O port. One of the status indicators is for marking the I/O port and the other status indicator is for faulting the I/O port. In one embodiment, the light-emitting system includes a plurality of differently colored LEDs. In another embodiment, the light-emitting system includes only one multicolor LED. Various I/O technologies including Fiber Channel, Fiber Connectivity, Ethernet, serial attached SCSI, IPsec, Infiniband, and iSCSI, can implement marking and faulting.

Marking and faulting input/output ports of an electronics system

Disclosed are ways of providing a highly flexible high availability storage system. Disk drive carriers for insertion into enclosures in a storage system include several disk drives. The enclosures accept carriers that include drives of different sizes, and drives compatible with different storage technologies, for instance Fibre Channel, SATA, or SAS. Drives oriented in their carriers in a manner that allows them to be connected to a common medium via identical flex circuits that are configured based on the orientation of the drives. Redundant controllers include redundant serial buses for transferring management information to the carriers. The carriers include a controller for monitoring the multiple serial buses and producing storage technology specific management commands for the disk drives.

Architecture for managing disk drives

Described are electronics systems and methods for distributing a limited number of lanes of a PCI Express-based processor (CPU) module among a plurality of PCI Express-based I/O modules with which the CPU module is in communication. The CPU module receives a code from each I/O module over a sideband interface between that I/O module and the CPU module. The coded signal represents a link-width capability of the I/O module. The CPU module is configured to allocate a link width to each I/O module based on the fixed number of lanes and the link-width capability as represented by the coded signal received from that I/O module. The link between CPU module and each I/O module is trained in accordance with the link width allocated to that I/O module.

Interface for establishing operability between a processor module and input/output (I/O) modules

Communications settings are managed. System characteristics are determined that affect communications on a high speed transmission link between nodes. The system characteristics includes system hardware information and physical characteristics of a cable. Tuning information is derived from the system characteristics. At least some of the tuning information is communicated between the nodes.

Managing communications settings

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Marlborough, MA, United States of America

Steven D Sardella