General Electric Company

Steven C Peak

Thomas E Anderson

Ole N Ibsen

A circuit disposed between a power supply and a load for detecting the flow of an excess of power from the load back through the supply. The circuit is comprised of means for sensing the instantaneous current flowing between the power supply and the load, and means for sensing the instantaneous output voltage from the power supply. The circuit is further comprised of means responsive to the sensed instantaneous voltage and current for generating a signal that is indicative of instantaneous power flowing between the power supply and the load. Means is also provided for filtering out those components of the signal indicative of the instantaneous power which are at a frequency higher than the frequency of the AC current flowing between the power supply and the load to obtain a signal having a magnitude indicative of the average power flowing therebetween. Further provided is means responsive to the average power signal for generating a signal to cause the disconnection of the power supply from the load when the average power signal is of a magnitude and polarity which is indicative of an excess in reverse power flowing from the load to the power supply.

Circuit for detecting the flow of an excess of reverse power from a load

A circuit for detecting a missed commutation in an inverter. The circuit includes means coupled to the center tap of a commutating interval current limiting reactor which is connected in series with and interposed between a pair of gate controlled rectifiers for generating a first signal upon detecting and for the duration of an interval when both of the rectifiers are ON. The circuit further provides means, responsive to a first pulse used to initiate an interval when either of the pair of rectifiers is to be 'ON', for generating a second signal. Also provided is a means responsive to the first and second signals for generating a control signal to cause cessation of the operation of the inverter, if the first signal is absent during the total occurrence of the second signal.

Circuit for detecting a missed commutation in an inverter

A circuit for detecting a malfunction in an inverter. The circuit includes means coupled to the center tap of a commutating interval current limiting reactor which is connected in series with and interposed between a pair of gate controlled rectifiers for generating a first signal upon detecting and for the duration of an interval when both of the rectifiers are ON. The circuit further provides means, responsive to a first pulse used to initiate an interval when either of the pair of rectifiers is to be 'ON', for generating a second signal having a duration greater than the normal duration of the first signal. Also provided is a means responsive to the first and second signals for generating a control signal to cause cessation of the operation of the inverter, if the second signal is absent during the occurrence of the first signal.

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Normal, IL, United States of America

Steven C Peak