Broadcom Corporation

Steven B Lindsay

Scott Sterling McDaniel

Uri Elzur

Frankie Fan

Andrew M Naylor

Andrew Hwang

Gary A Alvstad

Wael William Diab

Michael Asker

Caitlin Bestler

Shay Mizrachi

Kan Frankie Fan

Rafi Shalom

Eliezer Aloni

Uri El Zur

Amit Oren

Uri Tal

Dov Hirshfeld

Kobby Carmona

Merav Sicron

Kan (Frankie) Fan

Hav Khauv

Habib Anthony Abouhossein

Scott S Mcdaniel

The disclosed systems and methods relate to improving PCI Express (PCI-E) L1 Active State Power Management (ASPM) exit latency by speculatively initiating early L1 exit based on a network stimulus. Aspects of the present invention may enable a higher level of performance and responsiveness while supporting the benefits of ASPM. Aspects of the present invention may minimize operational cost by reducing latency in processes that utilize a PCI-E interface. Aspects of the present invention may be embodied in a Network Interface Controller (NIC) or any other device with a PCI-E interface that supports ASPM.

Method and system for improving PCI-E L1 ASPM exit latency

Various methods and systems are provided for buffer-batch management for energy efficient networking. In one embodiment, among others, a system includes a host device including an interface with a network. A device driver monitors requests to transmit packets from the host device to the network, buffers the packets in memory of the host device when the host device network interface is estimated to be in a low power mode, and initiates transition of the host device network interface to a full power mode based at least in part upon predefined criteria associated with the buffered packets. The host device network interface may begin transmission of the buffered packets when the host device network interface enters the full power mode. The host device network interface may be a network interface controller such as, e.g., an Ethernet controller configured for Energy Efficient Ethernet operation.

Enhanced buffer-batch management for energy efficient networking based on a power mode of a network interface

Systems and methods that network interface in a multiple network environment are provided. In one embodiment, the system includes, for example, a network connector, a processor, a peripheral component interface (PCI) bridge and a unified driver. The processor may be coupled to the network connector and to the PCI bridge. The processor may be adapted, for example, to process a plurality of different types of network traffic. The unified driver may be coupled to the PCI bridge and may be adapted to provide drivers associated with the plurality of different types of network traffic.

System and method for network interfacing in a multiple network environment

Aspects of the invention may include a dual port Ethernet controller having a bus interface, a first Ethernet controller coupled to the bus interface such as a PCI bus interface and a second Ethernet controller coupled to the bus interface. The first Ethernet controller, second Ethernet controller and bus interface are integrated within a single chip. The dual port Ethernet controller may also include an arbiter, which is coupled to the first Ethernet controller, the second Ethernet controller and the bus interface. A plurality of shared resources may be coupled to one or more of the first Ethernet controller, the second Ethernet controller and the arbiter. The shared resources may include, but is not limited to, a non-volatile memoryand a general purpose input/out interface.

Method and system for an integrated dual port gigabit ethernet controller chip

Aspects of the invention may comprise receiving an incoming TCP packet at a TEEC and processing at least a portion of the incoming packet once by the TEEC without having to do any reassembly and/or retransmission by the TEEC. At least a portion of the incoming TCP packet may be buffered in at least one internal elastic buffer of the TEEC. The internal elastic buffer may comprise a receive internal elastic buffer and/or a transmit internal elastic buffer. Accordingly, at least a portion of the incoming TCP packet may be buffered in the receive internal elastic buffer. At least a portion of the processed incoming packet may be placed in a portion of a host memory for processing by a host processor or CPU. Furthermore, at least a portion of the processed incoming TCP packet may be DMA transferred to a portion of the host memory.

System and method for TCP offload

Aspects of a method and system for optimized power management for a network device supporting PCI-E and energy efficient Ethernet are provided. In this regard, in a network interface controller that supports energy efficient Ethernet, a PCI-E core may be transitioned from a low power PCI-E state to a full power PCI-E state when a PHY core in the network interface controller initiates transition from a low power mode to a full power mode and before the PHY core receives an Ethernet packet. In another embodiment, the PHY core in the network interface controller may be transitioned from a low power mode to a full power mode when the PCI-E core initiates transition from a low power PCI-E state to a full power PCI-E state, and before the PCI-E core receives a command to send an Ethernet packet.

Method and system for optimized power management for a network device supporting PCI-E and energy efficient ethernet

A network interface device may include an offload engine that receives control of state information while a particular connection is offloaded. Control of the state information for the particular connection may be split between the network interface device and a host. The at least one connection variables may be updated and provided to the host.

System and method for TCP/IP offload independent of bandwidth delay product

A method for providing TCP/IP offload may include receiving control of at least a portion of Transmission Control Protocol (TCP) connection variables by a TCP/IP Offload Engine operatively coupled to a host. The at least a portion of the TCP/IP Offload Engine connection variables may be updated and provided to the host. The TCP/IP Offload Engine may receive control of segment-variant TCP connection variables. The TCP/IP Offload Engine may update the received TCP segment-variant TCP connection variables, and communicate the updated TCP segment-variant TCP connection variables to the host. A system for providing connection offload may include a TCP/IP Offload Engine that receives control of state information for a particular connection offloaded to a network interface card (NIC). Control of the state information for the particular connection may be split between the NIC and a host.

A system and method for energy savings through emulation of wake on LAN (WoL) in energy efficient Ethernet networks. An intermediary device between a computing device and a network can be alerted that the computing device has entered an energy saving state with wake on LAN (WoL) enabled. The intermediary device can transition the client interface that supports the computing device into an energy saving state and emulate the WoL function of the computing device by listening for a WoL message destined for the computing device. Upon receipt of a WoL message destined for the computing device, the intermediary device can transition the client interface back to an active state then transmit the received WoL message to the computing device.

System and method for energy savings through emulation of wake on LAN in energy efficient ethernet

A method for supporting ASF in an ASD using one or more embedded processors. In one aspect of the invention the method comprises accepting ASF related packets, examining the ASF related packets using a firmware routine running on the one or more embedded processors, and generating a response. It is emphasized that this abstract is provided to comply with the rules requiring an abstract, which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Alerting system, architecture and circuitry

A network controller may split, via a pass-through driver, processing of transmit and/or receive network traffic handled by the network controller. Physical layer (PHY) processing and/or Medium Access Control (MAC) processing of the management traffic may be performed internally via the network controller. The pass-through driver may route at least a portion of management traffic carried via the transmit and/or receive network traffic externally to said network controller for processing. In this regard, the pass-through driver may enable routing of data and/or messages to enable performing the external processing of management traffic. An application processor may be used to perform the external processing of management traffic.

System and method for interfacing with a management system

A method for processing network data is disclosed and may include receiving data via a single bus interface to which each of a plurality of Ethernet controllers are coupled, where the Ethernet controllers are integrated within a single chip. A particular one of the integrated Ethernet controllers may be identified based on information within the received data. The particular one of the integrated Ethernet controllers may be granted access to a shared resource within the single chip. The access to the shared resource may be granted using at least one semaphore register within the shared resource. The particular one of the integrated Ethernet controllers may be granted access to the single bus interface. The information may include a bus identifier, a bus device identifier and/or a bus function identifier. The shared resource may include a nonvolatile memory (NVM).

Method and system for addressing a plurality of ethernet controllers integrated into a single chip which utilizes a single bus interface

Systems and methods that network interface are provided. In one embodiment, a data center may be provided that may include, for example, a first tier, a second tier and a third tier. The first tier may include, for example, a first server. The second tier may include, for example, a second server. The third tier may include, for example, a third server. At least one of the first server, the second server and the third server may handle a plurality of different traffic types over a single fabric.

System and method for network interfacing

Systems and methods for network interfacing may include a communication data center with a first tier, a second tier and a third tier. The first tier may include a first server with a first single integrated convergent network controller chip. The second server may include a second server with a second single integrated convergent network controller chip. The third tier may include a third server with a third single integrated convergent network controller chip. The second server may be coupled to the first server via a single fabric with a single connector. The third server may be coupled to the second server via the single fabric with the single connector. The respective first, second and third server, each processes a plurality of different traffic types concurrently via the respective first, second and third single integrated convergent network chip over the single fabric that is coupled to the single connector.

Growing community of inventors

Mission Viejo, CA, United States of America

Steven B Lindsay