Texas Instruments Corporation

Steve Wiyi Yang

Henry T Yung

James R Hellums

James E Chloupek

Michael Joseph Tsecouras

Roberto Sadkowski

A mixed signal codec includes: a multiplexer amplifier,having an analog output signal; a sigma-delta analog to digital converter,having an input coupled to the analog output signal; and a clipping circuit,and,coupled to the input of the analog to digital converter for clipping the analog output signal.

Analog clipping circuit for mixed signal codecs

A voltage reference circuit includes: an amplifier A1 with low open loop output impedance, an output of the amplifier is coupled to a first input of the amplifier A1; and a first resistor R1 coupled between the output of the amplifier A1 and a reference node 30, the first resistor R1 has a resistance substantially equally to the low open loop output impedance, whereby a low frequency impedance at the reference node 30 is substantially equal to the resistance.

Low-noise low-impedance voltage reference

A digital-to-analog converter includes a first array of resistors 10-16 connected in series; a switch matrix 20 coupled to the first array of resistors 10-16; a first variable resistor RTOP coupled to a first end of the first array of resistors 10-16; and a second variable resistor RBOT coupled to a second end of the first array of resistors 10-16, the first variable resistor RTOP and the second variable resistor RBOT having a combined resistance that is a fixed resistance value.

Resistor string digital-to-analog converter

A circuit includes a first transistor M.sub.1 ; a second transistor M.sub.2 having a gate coupled to a gate of the first transistor M.sub.1 and a source coupled to a source of the first transistor M.sub.1 ; a third transistor M.sub.3 having a source coupled to a drain of the first transistor M.sub.1 and a drain coupled to a current input I.sub.b, the drain of the third transistor M.sub.3 is coupled to the gate of the first transistor M.sub.1 ; a fourth transistor M.sub.4 having a source coupled to a drain of the second transistor M.sub.2, a gate coupled to a gate of the third transistor M.sub.3, and a drain coupled to a supply node V.sub.DD ; and a variable voltage input V.sub.x coupled to the gate of the third transistor M.sub.3.

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Steve Wiyi Yang