Texas Instruments Corporation

Steve Thompson

David J Myers

Rajiv R Shah

Toan Tran

Stephen P Sacarisen

Deems R Hollingsworth

Harry F Pang

Gene E Blankenship

Johnson J Lin

A method of making a bipolar transistor in an LSI or VLSI process which includes forming a buried DUF collector of a first conductivity type, growing an epitaxial layer of a first conductivity type over said DUF collector and forming isolation means around a transistor region. The transistor region includes a trench which at least partially encloses the transistor region and extends through the DUF collector. Emitter and base regions of the first and second conductivity types, respectively, are formed in the epitaxial layer. A collector contact region of the first conductivity is formed in the epitaxial layer and extends down to the buried DUF collector.

Bipolar transistor with shallow junctions and capable of high packing

A process for making a metal fuse link in a MOS or CMOS process which includes depositing a refractory metal or metal alloy over an already deposited multi-level oxide and patterning the deposited metal or metal alloy so that it has a fusing segment between and integral with expanded segments such that the length and cross sectional area of the fusing segment is sufficiently small so that the fusing current therethrough is less than 20 milliamperes. The fuse and surrounding circuitry is covered with a passivation layer and contacts formed in the passivation layer to the expanded segments.

MOS programmable memories using a metal fuse link and process for making

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Richmond, TX, United States of America

Steve Thompson