Texas Instruments Corporation

Steve Prins

Anand Seshadri

Russell Carlton McMullan

Thomas J Aton

Lakshmikantha V Holla

Dharaneedharan S

An integrated circuit containing an SRAM may be formed using one or more periodic photolithographic patterns for elements of the integrated circuit such as gates and contacts, which have alternating line and space configurations in SRAM cells. Strap rows of the SRAM containing well ties and/or substrate taps which have SRAM cells on two opposite sides are configured so that the alternating line and space configurations are continuous across the regions containing the well ties and substrate taps.

SRAM well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell array

A semiconductor memory cell includes a set of circuit structures, each having column input/output circuits. The semiconductor memory cell further includes a set of replicas corresponding to the column input/output circuits. The set of replicas are non-functional and fills an empty space next to the column input/output circuits and hence, provides context protection for the column input/output circuits.

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Steve Prins