Illinois Tool Works Inc.

Steve Dumbovic

Richard P Bolger

Richard C Francke

Mark A Dempsky

An electrically resistive fluid level sensor and system for sensing fluid levels in a container, for example washing machine basins, and for closing a supply of fluid to the container when the fluid level in the container reaches a specified level. The system includes generally fluid level resistive element portions disposed in the container and electrically connectable by fluid therein, and an input signal source, electrically coupled to the fluid level resistive element portions, whereby an output signal across the fluid level resistive element portions is proportional to the fluid level. Temperature resistive element portions are preferably disposed in the container and connected in series between the input signal source and the fluid level resistive element portions to substantially cancel any thermal effects on fluid level sensing and control. The fluid level resistive element portions are electrically coupled to a signal input of a comparator circuit, whereby an output signal of the comparator circuit closes the supply fluid to the container when the fluid therein reaches a specified level.

Resistive fluid level sensing and control system

A switch circuit for selectively driving a LED display at either a dim or bright intensity in response to varying input voltages is provided. The switch circuit includes a current regulator device which is responsive to a reference voltage and is coupled to a LED display device for supplying a first level of constant current therethrough so as to illuminate the display device at a dim intensity and for supplying a second level of constant current therethrough so as to illuminate the display device at a bright intensity. A controllable switching device is responsive to input voltages of a wide varying range for being selectively turned on and off and for generating the reference voltage.

Aircraft cockpit switch circuitry

A solid state switch is provided which has the capability of retaining its last state memory in the event of a power failure or interruption. The solid state switch includes an output driver formed of at least one N-channel MOS field-effect transistor, a holding capacitor, a charging resistor, a transistor-connected diode interconnected between a power supply voltage source and the charging resistor for preventing leakage of the holding capacitor. The field-effect transistor has its drain connected to a first output terminal and it source connected to a second output terminal. One end of the holding capacitor is connected to the gate of the field-effect transistor and its other end is connected to a ground potential. The holding capacitor retains the last state between the first and second output terminals in the event of a loss of the power supply voltage source.

Solid state switch with last state memory

A method for effecting full duplex communications through a plurality of ports of a processing apparatus having one timer. Each output and input signal is expressed as a plurality of bit time intervals. The timer is operated to establish cycles of duration equal to the bit time interval with each of the cycles being divided into sub-bits; designating one of the sub-bits within each of the cycles as a transmitting sub-bit and, upon commencement of the transmitting sub-bit, latching the output pins of appropriate ports at a signal level indicating an output signal bit for transmission at such ports and, upon completion of that latching, interrogating all of the ports for presence of an input signal; upon commencement of sub-bits other than a transmitting sub-bit, interrogating all of the ports for presence of input signals; designating sub-bits of a first cycle during which presence of an input signal is detected as initial sub-bits and identifying sub-bits immediately succeeding initial sub-bits as confirming sub-bits on a port-by-port basis; recognizing input signals detected during confirming sub-bits as true input signals and tagging ports at which true input signals are detected as true input ports; after such tagging, effecting selective interrogation of true input ports in subsequent cycles during sub-bits appearing in a sequential order corresponding to the confirming sub-bits in the first cycle, which selective interrogation of each of the true input ports continues until the input signal at respective true input ports ceases.

Method for effecting one timer interrupt for multiple port communication

An electronic keyboard is disclosed in which the keyboard matrix is scanned by an integrated circuit scanner which incorporates a programmable repeat rate and repeat delay rate counter. The repeat interval of a key is achieved by setting the repeat counter to a predetermined count value so that this repeat interval is obtained when a repeatable key has been depressed. The repeat delay rate interval is delayed by a count value that is set in the counter so that the repeat delay interval may be shortened when a repeatable key is held down for continued repeating of the code signal. In the keyboard an eight bit counter is utilized in which all eight bits can be used for the delay rate, but in all cases the four least significant bits are used for the repeat rate. Both the repeat rate and the delay rate are externally programmable during the same programming period, under the control of external processing equipment to which the keyboard is connected. External programming of the repeat rate and the repeat delay rate counter allows the keyboard to be produced at a reduced cost over microcomputer implemented keyboards.

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Elmhurst, IL, United States of America

Steve Dumbovic