National Semiconductor Corporation

Steve A Martinez

Gregory J Smith

Stuart B Shacter

David James Megaw

Paul David Ranucci

Jang Dae Kim

Rajesh R Berigei

Satya N Mishra

Hui X Li

Alan P Bucholz

An Algorithmic Reactive Testbench (ART) system is provided for the simulation/verification of an analog integrated circuit design. The ART system is a high level simulation/verification environment with a user program in which one or more analog testbenches are instantiated and operated as prescribed in an algorithmic reactive testbench program, and the properties of the unit testbenches (test objects) can be influenced by prior analysis of themselves or other tests. The test object may also contain various properties including information reflecting the status of the test object. The modification of a property of a test object is an act of communication in the ART system from the algorithmic reactive testbench program to the test object.

Algorithmic reactive testbench for analog designs

A switching buck regulator circuit includes an n-type high-side switch. The driver of the high-side switch employs a boot voltage (Vcboot) as a power supply. Also, the output current is mirrored to a sense branch. A current sense voltage is generated employing a transistor in the sense branch. The current sense voltage is compared to a reference voltage that is generated employing another transistor having a gate that is coupled to the gate of the sense branch transistor. A diode (Dp) is coupled between the gate of the sense branch transistor and the input voltage (Vin). Another diode (Dc) is coupled between the gate of the sense branch transistor and Vcboot. When the high-side switch is off, the current sense voltage is clamped to substantially Vin&#x2212;V&#x2212;V. When the high-side switch is on, the gate voltage of the high-side switch is substantially given by Vcboot&#x2212;V.

Apparatus and method for monitoring current for a high-side switch

A biasing circuit is arranged to provide relatively well controlled startup and steady state behavior for a reference circuit such as noise immunity and reduced dependence on supplies. The biasing circuit initially employs an independent bias current for biasing the reference circuit at startup until a large enough bootstrapped (output voltage referenced) bias current can be generated that can take over the subsequent biasing of the circuit in the steady state. In one embodiment, a Power On Reset (POR) signal can be generated during the transition from an initial biasing of the reference circuit by the independent bias current to a subsequent steady state biasing provided by the bootstrapped bias current. Also, the assertion of the POR signal can be employed to turn off the transistors providing the independent bias current.

Bootstrapped bias mixer with soft start POR

A bidirectional current control circuit suitable for use in controlling the charging and discharging of rechargeable battery cells includes two serially connected metal oxide semiconductor field effect transistors (MOSFETs) with respective body diodes, a resistor which is connected in series with the MOSFETs and develops a voltage based upon the current through such MOSFETs, and a control circuit. The control circuit monitors the voltage across the resistor and selectively switches the MOSFETs on or off individually. As long as the current through the MOSFETs is less than a maximum positive current and more than a minimum negative current, both MOSFETs are maintained in their respective on states. When the negative current becomes less than a minimum negative current, the first MOSFET is turned off while the second MOSFET is turned on, and when the positive current becomes greater than a maximum positive current, the second MOSFET is turned off while the first MOSFET is turned on. In both situations, when the current conducted by the MOSFET which is turned on and the body diode of the MOSFET which is turned off reverses direction and rises above a minimum current while remaining below the corresponding maximum current, a return to a safe operating condition is thereby indicated and both MOSFETs are turned on. In an alternative embodiment, the control circuit monitors the voltage across the MOSFETs themselves to determine whether and when to switch the individual MOSFETs on or off.

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Tucson, AZ, United States of America

Steve A Martinez