Hrl Laboratories, LLC

Stephen Thomas, Iii

Rajesh D Rajavel

David H Chow

Yakov Royter

Kenneth Robert Elliott

Charles H Fields

Ken Elliott

Ken Elliot

Dave Chow

A double heterojunction bipolar transistor on a substrate comprises a collector formed of InGaAsP, a base in contact with the collector, an emitter in contact with the base, and electrodes forming separate electrical contacts with each of the collector, base, and emitter, respectively. A device incorporates this transistor and an opto-electronic device optically coupled with the collector of the transistor to interact with light transmitted therethrough.

Transistor with InGaAsP collector region and integrated opto-electronic devices employing same

The present invention provides a layout for a self-aligned semiconductor device, comprising an emitter mesa structure having an emitter electrode, and a base region that is comprised of a base electrode, with the base electrode deposited along crystal planes of the emitter mesa structure that undercut when the emitter mesa structure is etched, while avoiding depositing of the base electrode along crystal planes of the emitter mesa structure that do not undercut when the emitter mesa structure is etched. This allows the emitter electrode and the base electrode to self-align along the crystal planes that the emitter mesa structure undercuts when etched, and be isolated along the crystal planes that the emitter mesa structure does not undercut when etched. The present invention further provides dual interconnects mechanism and for connecting external circuitry to various semiconductor layers.

Layout for self-aligned emitter-base processing

A sub-micron, on the order of 80-nanometer diameter, resonant tunneling diode having a peak-to-valley ratio of approximately 5.1 to 1, and a method for its manufacture. The invention is unique in that its performance characteristics are unmatched in comparably sized resonant tunneling diodes. Further, the polyimide passivation and planarization methodology provides unexpected processing advantages with respect to application in the fabrication of resonant tunneling diodes. The invention includes a substratethat serves as a foundation for bottom contact layersand a polyimidecoating. An ohmic metal contactand emitter metal contactprotrude above the polyimidecoating exposing the ohmic metal contactand emitter metal contactThe contacts are capped with an etch-resistant coatingthus allowing for the polyimide etch, and other etching processes without adversely affecting the contacts.

80 nanometer diameter resonant tunneling diode with improved peak-to-valley ratio

A heterojunction bipolar transistor and a method of making a heterojunction bipolar transistor. The heterojunction bipolar transistor includes: a regrown emitter region; an intrinsic base region forming a junction with the regrown emitter region; and an extrinsic base region separated from the regrown emitter region. The thickness of the extrinsic base region is greater than the thickness of the intrinsic base region.

Heterojunction bipolar transistor and method to make a heterojunction bipolar transistor

A semiconductor structure having a self-aligned base contact and an emitter, where the base contact is electrically isolated from the emitter by a dielectric layer. The separation between the base contact and the emitter is determined by the thickness of the dielectric layer and the width of the emitter is determined by the minimum resolution provided by the fabrication techniques and tools used to define features within the dielectric layer.

Semiconductor device having a self-aligned base contact and narrow emitter

A sub-micron, on the order of 80-nanometer diameter, resonant tunneling diode having a peak-to-valley ratio of approximately 5.1 to 1, and a method for its manufacture. The invention is unique in that its performance characteristics are unmatched in comparably sized resonant tunneling diodes. Further, the polyimide passivation and planerization methodology provides unexpected processing advantages with respect to application in the fabrication of resonant tunneling diodes. The invention includes a substrate that serves as a foundation for bottom contact layers and a polyimide coating. An ohmic metal contact and emitter metal contact protrude above the polyimide coating exposing the ohmic metal contact and emitter metal contact The contacts are capped with an etch resistant coating thus allowing for the polyimide etch, and other etching processes without adversely affecting the contacts.

Method of manufacture for 80 nanometer diameter resonant tunneling diode with improved peak-to-valley ratio and resonant tunneling diode therefrom

High-speed, low capacitance heterojunction bipolar transistors (HBTs) and a method for their fabrication are disclosed. The devices are fabricated by a manufacturable process which moves patterning and deposition of the base post up versus the current manufacturing process, thus permitting fabrication of a smaller base post and base metal contact and reducing the base-collector capacitance.

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Redondo Beach, CA, United States of America

Stephen Thomas, Iii