Intel Corporation

Intel Corportion

Stephen Sturges

Brad L Inman

Christopher J Nelson

James Edward Neeb

Jin Pan

Timothy J Callahan

Erkan Acar

Bradly L Inman

Shelby G Rollins

Sundar V Pathy

Robert C Hash

Matthew Hendricks

Hiren V Tilala

Jared Pager

Embodiments herein relate to apparatus, systems, and methods to compress a test pattern onto a field programmable gate array to test a device under test. This may include identifying values of a plurality of drive pins for a plurality of test cycles to apply to an input of the DUT for each of the plurality of test cycles, identifying values of a plurality of compare pins for the plurality of test cycles to compare an output of the DUT, respectively, for each of the plurality of test cycles, analyzing the identified values, compressing, based on the analysis, the values of the plurality of drive pins and the plurality of compare pins, and storing the compressed values on the FPGA.

Compressed test patterns for a field programmable gate array

A test apparatus and method of testing a DUT are described. The apparatus includes a receiver and transmitter path each having a pair of switches that switch between a bypass position and a direct position. The bypass position is used for low frequency signals communicated through the apparatus. The direct position allows higher frequency signals to be double converted by upconversion to an IF signal and bandpass filtered before being downconverted to a predetermined frequency. Both variable and fixed LO signals are used to convert the double converted signals so that the same IF may be used independent of the higher frequency signal received or transmitted. Bandpass filtering is applied before and after amplification of the IF signal. Lowpass filtering before and after the double conversion use LPFs of different cutoff frequencies.

High density low cost wideband production RF test instrument architecture

Low cost test for Integrated Circuits or electrical modules using a reconfigurable logic device is described. In one embodiment, the invention includes configuring a reconfigurable logic device to comply with input standards of a device under test, applying test signals to the device under test, detecting output results of the device under test, and analyzing the detected output results.

Low cost test for IC's or electrical modules using standard reconfigurable logic devices

A method and apparatus for permitting diagnostics in a PC is described. Signals, imperceptible to a user, are transmitted through the LED used to indicate on/off power status. A small hand-held device may be used for detecting and interpreting the signals and to provide a visual indication to the user of a particular problem.

Non-invasive, low cost method and apparatus for the transmission, display and detection of internal computer status

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Portland, OR, United States of America

Stephen Sturges