Sandisk Technologies Inc.

Stephen Shi

Raghuveer S Makala

Johann Alsmeier

George Matamis

Jayavel Pachamuthu

Henry Chien

Yao-Sheng Lee

Sateesh Koka

Daxin Mao

Zhenyu Lu

Chun Ge

Matthias Baenninger

A stack of alternating layers comprising first epitaxial semiconductor layers and second epitaxial semiconductor layers is formed over a single crystalline substrate. The first and second epitaxial semiconductor layers are in epitaxial alignment with a crystal structure of the single crystalline substrate. The first epitaxial semiconductor layers include a first single crystalline semiconductor material, and the second epitaxial semiconductor layers include a second single crystalline semiconductor material that is different from the first single crystalline semiconductor material. A backside contact opening is formed through the stack, and backside cavities are formed by removing the first epitaxial semiconductor layers selective to the second epitaxial semiconductor layers. A stack of alternating layers including insulating layers and electrically conductive layers is formed. Each insulating layer contains a dielectric material portion deposited within a respective backside cavity. Each electrically conductive layer contains a material from a portion of a respective second epitaxial semiconductor layer.

Crystalline layer stack for forming conductive layers in a three-dimensional memory structure

Dielectric degradation and electrical shorts due to fluorine radical generation from metallic electrically conductive lines in a three-dimensional memory device can be reduced by forming composite electrically conductive layers and/or using of a metal oxide material for an insulating spacer for backside contact trenches. Each composite electrically conductive layer includes a doped semiconductor material portion in proximity to memory stack structures and a metallic material portion in proximity to a backside contact trench. Fluorine generated from the metallic material layers can escape readily through the backside contact trench. The semiconductor material portions can reduce mechanical stress. Alternatively or additionally, a dielectric metal oxide can be employed as an insulating spacer on the sidewalls of the backside contact trench, thereby blocking a diffusion path for fluorine radicals generated from the metallic material of the electrically conductive layers, and preventing electrical shorts between electrically conductive layers and/or a backside contact via structure.

Three-dimensional integration schemes for reducing fluorine-induced electrical shorts

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Milpitas, CA, United States of America

Stephen Shi