Hewlett-packard Development Company, L.P.

Leland Stanford Junior University

Stephen Richardson

Paul S Keltcher

Mark A Horowitz

Ofer Shacham

Joseph Ku

Padmanabha I Venkitakrishnan

Stuart Siu

Shankar Venkataraman

Gary Vondran

A chip generator according to an embodiment of the present invention codifies designer knowledge and design trade-offs into a template that can be used to create many different chips. Like reconfigurable designs, an embodiment of the present invention fixes the top level system architecture, amortizes software and validation and design costs, and enables a rich system simulation environment for application developers. Meanwhile, below the top level, the developer can 'program' the individual inner components of the architecture. Unlike reconfigurable chips, a chip generator according to an embodiment of the present invention, compiles the program to create a customized chip. This compilation process occurs at elaboration time&#x2014;long before silicon is fabricated. The result is a framework that enables more customization of the generated chip at the architectural level because additional components and logic can be added if the customization process requires it.

System and method for a chip generator

Multiple processors are mounted on a single die. The die is connected to a memory storing multiple operating systems or images of multiple operating systems. Each of the processors or a group of one or more of the processors is operable to execute a distinct one of the multiple operating systems. Therefore, resources for a single operating system may be dedicated to one processor or a group of processors. Consequently, a large number of processors mounted on a single die can operate efficiently.

Chip multiprocessor with multiple operating systems

In response to determining a requested line of data is not stored within a local memory, the requested line of data is written to the local memory from a remote memory. Additionally, a victim page is selected in the local memory in response to the requested line of data not being in the local memory and it is determined whether one or more lines of the victim page are dirty. Furthermore, the one or more dirty lines are written to the remote memory in response to determining that the one or more lines are dirty and the requested line of data is fetched from the remote memory. Moreover, the requested line of data is stored within the page of data at a location previously occupied by the victim page.

Storing data in memory

A computer system for storing corresponding instruction blocks in a compressed form in a main memory and in an uncompressed form in an instruction cache. The instruction cache line addresses for the uncompressed instruction blocks in the instruction cache have an algebraic correlation to the main memory line addresses for the compressed instruction blocks in the main memory. Preferably, the instruction cache line addresses are proportional to the corresponding main memory line addresses.

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Los Altos, CA, United States of America

Stephen Richardson