The Titan Corporation

Cipher Data Products, Inc.

Stephen R Schossow

William S Clark, Jr

Thomas C Reiner

Neal E Foxworthy

Robert J Gabbay

In a data processing system, stored data that is essential to a given data processing operation, such encryptographic key generation, is tamper proof in that if such data is altered, processing of the altered data is inhibited upon retrieval. The system includes a memory for storing a plurality of data bits and in which the storage of one type of the bits is irreversible; a data processor, such as a cryptographic processor, coupled to the memory for retrieving the bits from a first section of the memory and for processing the retrieved bits with other data bits; an authentication unit coupled to the memory for processing the bits stored in the first section of the memory with bits stored in a second section of the memory to provide an indication as to whether or not the bits stored in the first section of the memory have a predetermined relationship to the bits stored in the second section of the memory; and a gate coupled to the data processor and to the authentication unit for inhibiting the data processor from processing the data bits retrieved from the first section of the memory unless the authentication unit indicates that the bits stored in the first section of the memory have the predetermined relationship to the bits stored in the second section of the memory. Since storage of one type of the bits is irreversible, although a pirate can alter the logic state of one type of bit in one section of the memory, he cannot alter the the logic state of the other type of bit in the other of the memory so as restore the predetermined relationship between the bits in the first section of the memory and the bits in the second section of the memory.

Tamper-proof data storage

In a system for transferring data between a host device and a target recording medium, a buffer interface control unit includes a host direct memory access (DMA) unit for transferring data from the host unit to a buffer memory. The host DMA unit accesses a first set of prescribed noncontinuous buffer memory storage locations to store the data transferred from the host unit in a predetermined buffer format that includes additional sets of prescribed storage locations interspersed with the first set of data storage locations for the storage of error code characters pertaining to the data. The host DMA unit also transfers error correction code characters pertaining to the data to one of the additional sets of prescribed storage locations. The buffer interface control unit further includes a target DMA unit for transferring data from the buffer memory to a write interface unit. The target DMA unit accesses the buffer memory storage locations in a predetermined noncontinuous sequence in order to retrieve the data from the buffer memory in a format that includes open time slots interspersed with time slots occupied by the retrieved data for the insertion of error detection code characters pertaining to the data retrieved from the buffer memory.

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San Diego, CA, United States of America

Stephen R Schossow