Texas Instruments Corporation

Cisco Systems Inc.

Stephen R Nelson

Glen R Haas

Dennis D Davis

Buford H Carter, Jr

Tammy J Lahutsky

Henry F Breit

James A Forster

Susan V Bagen

Charles W Suckling

John E Barnett, Jr

Glenn Collinson

Douglas J Darrow

John Barnett

A reduced size field effect transistor is disclosed which has a substrate with a body of semiconductor material having an active region on one surface thereof, and a common conductor located in remote insulated relation to the one surface of the semiconductor body, a pair of source electrodes, a drain electrode and a gate electrode located on the one surface, with the drain electrode having drain fingers located on opposite sides of each of the source electrodes and an air bridge overlying the source electrodes and interconnecting the drain fingers located on opposite sides of each of the source electrodes, the gate electrode having a connection pad at one side thereof and a manifold extending between the source electrodes, and having gate fingers extending between the drain fingers and the source electrodes, and conductive connections between the source electrodes and the common conductor.

Reduced size field effect transistor

This is a device package comprising: a leadframe comprising a plurality of leads for effecting circuit connections to the device; and a metal ground piece connected to the leadframe. Other devices and methods are also disclosed.

RF device package for high frequency applications

In one form of the invention, a package for integrated circuits and devices (42), (46) is disclosed, the package including: a package base (44), the base having a first top surface; a layer of material (43) on the first top surface of the base (44) wherein the material (43) is patterned to cover a portion of the base, and wherein the layer of material (43) forms a substrate having a second top surface; a microstrip transmission line (45) on the second top surface; and a plastic encapsulant (50), wherein the encapsulant covers the first top surface of the base.

Package for integrated circuits

This is a package [10] for an rf device [11] operable with a characteristic impedance providing a plurality of terminals [12-19] and [101] for effecting circuit connections to the device, the connection between at least one of the terminals and the device being matched in relation to the characteristic impedance. Other devices and methods are also disclosed.

Device packaging

This is a monolithic PIN diode switch circuit. The switch comprises: input ports, output ports, bias nodes and PIN diodes. Each port or node is connected to receive a bias signal. Preferably the PIN diodes are fabricated from GaAs or other III-V compound. This monolithic PIN diode switch offers broader band performance and smaller size. Other methods and devices are disclosed.

PIN diode switch

This is a monolithic PIN diode switch circuit. The switch comprises: input ports, output ports, bias nodes and PIN diodes. Each port or node is connected to receive a bias signal. Preferably the PIN diodes are fabricated from GaAs or other III-V compounds. This monolithic PIN diode switch offers broader band performance and smaller size. Other methods and devices are disclosed.

Growing community of inventors

Richardson, TX, United States of America

Stephen R Nelson