Freescale Semiconductor,inc.

Stephen Pickering

Michael Rohleder

Michael C Wood

Edward J Hathaway

John Doyle

Christian Vetterli

John Logan

A memory management unit comprises register and control logic and arranged to support a microprocessor controller unit accessing physical address space via an address bus wherein the microprocessor controller unit comprises a program counter having a first address size, the memory management unit wherein the register and control logic comprises a register having a second address size greater than the first address size and arranged to provide an extended address bus between the microprocessor controller unit and physical address space.

Memory management unit and method of accessing an address

An apparatus and method for communicating information within a network having one or more communication buses (), consisting of one or more elements () to maximise throughput and minimise CPU involvement by executing the following. Compare incoming message identifiers () against a set of predetermined identifiers (). Transpose data sets () within the incoming message data frame and where necessary, save and/or transmit new frames as defined by operations dependent upon the incoming identifier. By utilising an optimal set of operands the memory requirement is satisfied by a minimal size of standard type.

Information communication controller interface apparatus and method

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Hamilton, United Kingdom

Stephen Pickering