Texas Instruments Corporation

Stephen Phillip Savage

Johan Tjeerd Strydom

Maxim James Franke

Rajdeep Bondade

Mrinal Kanti Das

Harsh Dinesh Jhaveri

Ryan Patrick Savage

An example apparatus includes a multiplexer; a first memory coupled to the multiplexer; a second memory coupled to the multiplexer, the second memory including a bi-level reset indicator, a multi-level reset indicator, and a duration indicator; a memory controller coupled to the multiplexer; and waveform generation circuitry coupled to the memory controller, the waveform generation circuitry including: a first power supply configured to receive the bi-level reset indicator; a second power supply configured to receive the multi-level reset indicator; and timing circuitry configured to receive the duration indicator.

Methods and apparatus to generate waveforms

In one example, an apparatus comprises: a voltage sensing circuit having a voltage sensing terminal and a voltage sensing output, the voltage sensing circuit configured to generate a first voltage at the voltage sensing output representing a second voltage at the voltage sensing terminal; a control circuit having a control circuit input and a control circuit output, the control circuit input coupled to the voltage sensing output, the control circuit configured to: determine a state of a transistor based on the first voltage; and generate a driver signal at the control circuit output based on the state; and a driver circuit having a driver input and a switch control output, the driver input coupled to the control circuit output, the driver circuit configured to provide a current at the switch control output responsive to the driver signal.

Transistor switching based on voltage sensing

Method and apparatus for matched buffer decompression. In some examples, a circuit comprising a first data element, a second data element, a first buffer coupled to the first data element, a second buffer coupled to the second data element, compression override logic circuits coupled to the first data element and the second data element, and a parallel register coupled to the compression override logic circuits.

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Richardson, TX, United States of America

Stephen Phillip Savage