International Business Machines Corporation

Other

Globalfoundries Inc.

Samsung Electronics Co., Ltd.

Applied Materials, Inc.

Freescale Semiconductor,inc.

Chartered Semiconductor Manufacturing Ltd (corporation)

Stephen McConnell Gates

Alfred Grill

Son Van Nguyen

Satyanarayana Venkata Nitta

Sampath Purushothaman

Daniel C Edelstein

Jeffrey Curtis Hedrick

Deborah A Neumayer

Elbert Emin Huang

Timothy Joseph Dalton

John Anthony Fitzsimmons

Vishnubhai Vitthalbhai Patel

Christopher Bruce Murray

Christos Dimitrios Dimitrakopoulos

Michael Wayne Lane

Roy E Scheuerlein

Robert Dennis Miller

Dirk Pfeiffer

Thomas M Shaw

Vincent James McGahay

Darryl D Restaino

Matthew Earl Colburn

Muthumanickam Sankarapandian

Charles Thomas Black

Stephan Alan Cohen

Chih-Chao Yang

Bahman Hekmatshoartabari

Christopher J Penny

Philip George Emma

Sanjay C Mehta

Terry Allen Spooner

Xiao Hu Liu

Deepika Priyadarshini

Tak H Ning

Russell Alan Budd

Ramachandran Muralidhar

Jason Scott Orcutt

Wei Hwang

Stephen Edward Greco

Nicholas C M Fuller

Vivekananda P Adiga

Gregory M Fritz

Eric Gerhard Liniger

Fabio Carta

Shouheng Sun

Theodorus E Standaert

Guy M Cohen

Qinghuang Lin

Subramanian Srikanteswara Iyer

Eren Kursun

Kevin Shawn Petrarca

Griselda Bonilla

Eric Andrew Joseph

Gary Bela Bronner

Donald Francis Canaperi

Jean-Olivier Plouchart

Xinhui Wang

Mahadevaiyer Krishnan

Chun-Yung Sung

David Robert Medeiros

Spyridon Skordas

Charles Thomas Rettner

Robert L Sandstrom

Timothy James McArdle

Christy Sensenich Tyberg

Stanley Joseph Whitehair

Satya Venkata Nitta

Matthew S Angyal

Habib Hichri

Horatio Seymour Wildman

Joyeeta Nag

David V Horak

Ghavam G Shahidi

Vijay Narayanan

Davood Shahrjerdi

Baozhen Li

Jack Oon Chu

Jae Hun Kim

Kailash Gopalakrishnan

Paul Charles Jamison

Alexandros T Demos

Wayne Harvey Woods, Jr

Douglas Max Gill

Shyng-Tsong Chen

Edward William Kiewra

John Rozen

Kang Sub Yim

Kang-Wook Lee

William J Cote

Michael D Armacost

Joe Lee

Abram L Falk

Lynne Marie Gignac

Anthony Cyril Lowe

Alberto Valdes-Garcia

Ricardo Alves Donaton

Maurice McGlashan-Powell

Johnny Widodo

Terry Grant Sparks

Steven E Molis

A superconducting connecting system includes an anti-fuse structure. There is a first superconducting trace having a first segment that is cantilevered over a cavity a substrate. A second superconducting trace having a second segment is cantilevered over the cavity in the substrate. A first auxiliary segment is coupled to the first segment and suspended over the cavity. A second auxiliary segment is coupled to the second segment and suspended over the cavity. The first segment and the second segment face each other and have a predetermined gap therebetween. The first segment and the second segment are configured to receive an output of a laser. An amount of material of the first and second auxiliary segment is based on creating a fuse ball joint that provides an electrical short between the first superconducting trace and the second superconducting trace, upon receiving the output of the laser.

Anti-fuse and fuse structures for improving the functionality of qubit circuits

A method of constructing a superconducting switch includes depositing a thin sacrificial layer on top of a substrate. The sacrificial layer is patterned to remove portions of the sacrificial layer except at a first portion of the substrate. A superconducting metal layer is patterned on top of the substrate and on top of the sacrificial layer. The superconducting metal layer is patterned to form a superconducting metal line over the sacrificial layer. The patterned sacrificial layer is etched from under the superconducting metal line to release the metal line from the substrate.

The subject disclosure is directed towards layered substrate structures with aligned optical access to electrical devices formed thereon for laser processing and electrical device tuning. According to an embodiment, a layered substrate structure is provided that comprises an optical substrate having a first surface and a second surface and a patterned bonding layer formed on the second surface that comprises a bonding region and an open region, wherein the open region exposes a portion of the second surface. The layered substrate structure further comprises a device chip bonded to the patterned bonding layer via the bonding region and comprising at least one electrical component aligned with the optical substrate and the open region. The at least one electrical component can include for example, a thin film wire, an air bridge, a qubit, an electrode, a capacitor or a resonator.

Layered substrate structures with aligned optical access to electrical devices

Techniques regarding microwave-to-optical quantum transducers are provided. For example, one or more embodiments described herein can include an apparatus that can include a microwave resonator on a dielectric substrate and adjacent to an optical resonator, and a photon barrier structure at least partially surrounding an optical resonator, wherein the photon barrier structure is configured to provide isolation of the microwave resonator from optical photons in the dielectric substrate outside the photon barrier structure.

Microwave-to-optical quantum transducers

A method of forming an active matrix pixel that includes forming a driver device including contact regions deposited using a low temperature deposition process on a first portion of an insulating substrate. An electrode of an organic light emitting diode is formed on a second portion of the insulating substrate. The electrode is in electrical communication to receive an output from the driver device. At least one passivation layer is formed over the driver device. A switching device comprising at least one amorphous semiconductor layer is formed on the at least one passivation layer over the driver device.

Vertically integrated active matrix backplane

A scaled dielectric stack interlayer, compatible with subsequent high temperature processing with good electrical transport & reliability properties is provided. A method for forming a conformal aSi:H passivation layer on a semiconductor device is described. A patterned semiconductor wafer is placed in in a process chamber with a first layer formed thereon and a second layer formed thereon, the first layer and the second layer being two different materials Next, a SiHbased deposition up to a temperature of 400 degrees Celsius is used on the first layer and the second layer thereby forming a conformal aSi:H passivating layer is formed at a higher rate of deposition on the first layer selectively and a lower rate of deposit on the second layer.

Selective and conformal passivation layer for 3D high-mobility channel devices

A semiconductor substrate including one or more conductors is provided. A first layer and a second layer are deposited on the top surface of the conductors. A dielectric cap layer is formed over the semiconductor substrate and air gaps are etched into the dielectric layer. The result is a bilayer cap air gap structure with effective electrical performance.

Air gap semiconductor structure with selective cap bilayer

A bipolar junction transistor comprises a semiconductor layer disposed on an insulating material, at least a portion of the semiconductor layer forming a base region. The bipolar junction transistor further comprises a transistor emitter laterally disposed on a first side of the base region, where in the transistor emitter is a first doping type and has a first width, and wherein the first width is a lithographic feature size. The bipolar junction transistor further comprises a transistor collector laterally disposed on a second side of the base region, wherein the transistor collector is the first doping type and the first width. The bipolar junction transistor further comprises a central base contact laterally disposed on the base region between the transistor emitter and the transistor collector, wherein the central base contact is a second doping type and has a second width, and wherein the second width is a sub-lithographic feature size.

Lateral bipolar transistor

A semiconductor device and a method of fabricating a contact to interface with an interconnect in a semiconductor device are described. The device includes a dielectric layer formed on a semiconductor layer, and a contact fabricated in a via formed within the dielectric layer. An interconnect formed above the contact interfaces with an exposed surface of the contact opposite a surface closest to the semiconductor layer. The contact includes a contact material in a first portion of the contact and an interface metal in a second portion of the contact.

Low resistance metal contacts to interconnects

Embodiments are directed to a coupler system having an interposer configured to couple optical signals. The interposer includes at least one optoelectronic component formed on a glass substrate. The interposer further includes at least one waveguide formed on the glass substrate and configured to couple the optical signals to or from the at least one optoelectronic component, wherein the at least one waveguide comprises a waveguide material having grain diameters greater than about one micron and an optical loss less than about one decibel per centimeter of optical propagation.

Low-loss large-grain optical waveguide for interconnecting components integrated on a glass substrate

Method of forming an air gap semiconductor structure with selective cap bilayer

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Ossining, NY, United States of America

Stephen McConnell Gates