Fairchild Semiconductor Corporation

Stephen Martin

Yong Liu

Howard Allen

Dan Kinzer

Rajeev Dinkar Joshi

Luke G England

Romel Nogas Manatad

Jonathan A Noquil

Venkat Iyer

Hun Kwang Lee

David Chong

Douglas Alan Hawks

Connie Tangpuz

This document discusses, among other things, a conductive frame, a silicon die coupled to the conductive frame, the silicon die including a vibratory diaphragm, the die having a silicon die top opposite a silicon die bottom, with a silicon die port extending through the silicon die to the vibratory diaphragm, with a silicon die terminal in electrical communication with the conductive frame and an insulator affixed to the conductive frame and the silicon die, with the insulator extending through interstices in the conductive frame to a conductive frame bottom of the conductive frame, and around an exterior of the silicon die to the silicon die top, with the insulator physically affixed to the silicon die and to the conductive frame, with the silicon die port exposed and with a conductive frame terminal disposed at the conductive frame bottom in electrical communication with the silicon die terminal.

Microelectromechanical systems microphone packaging systems

This document discusses, among other things, apparatus and methods for an IC package including first and a second discrete components fabricated into a semiconductor substrate. The first and second discrete components can be adjacent to one another in the semiconductor substrate, and an integrated circuit die can be mounted on the semiconductor substrate and coupled to the first and second discrete components.

Wafer level stack die package

This document discusses, among other things, an IC package including first and a second discrete components fabricated into a semiconductor substrate. The first and second discrete components can be adjacent to one another in the semiconductor substrate, and an integrated circuit die can be mounted on the semiconductor substrate and coupled to the first and second discrete components.

A semiconductor die package is disclosed. It may include a semiconductor die having a first surface and a second surface, and a leadframe structure. A molding material may be formed around at least a portion of the die and at least a portion of the leadframe structure. A solderable layer may be on the exterior surface of the molding material and the first surface of the semiconductor die.

Method to manufacture a universal footprint for a package with exposed chip

A die attach package for connecting a die or chip of die-down orientation to a printed circuit board in a die-up orientation. The package includes a substrate with leads that may be traces terminating in vias or that may be the leads of a lead frame. The traces or the leads of the lead frame are modified such that they pass under the die when the die is attached. The traces or leads are routed under the die such that proper connections are established from the topside of the die to the appropriate mount locations of the printed circuit board. The die is attached to the substrate using a non-electrically-conductive material. This packaging enables a fabricator to make die of one orientation type, die down, and use that die in a die-up package, thereby saving on fabrication costs.

Growing community of inventors

South Portland, ME, United States of America

Stephen Martin